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2014 Jul 18
2
[LLVMdev] how to define INTRINSIC_W_CHAIN
Tks Tom, That is my confusing part. How can I make it to "access memory” so it will HasChain? Is there any flag set like in typeProfile, Node, instructions? myLoad, mayStore, SDNPHasChain? -kevin On Jul 18, 2014, at 4:26 PM, Tom Stellard <tom at stellard.net> wrote: > On Fri, Jul 18, 2014 at 04:15:45PM -0400, kewuzhang wrote: >> sure! >> >> class TEST_INTINSIC_FM< string asmstr> : Intrinsic &...
2009 Feb 20
2
[LLVMdev] help: about how to use tblgen to constraint operand.
...T1( R2, R3 pair). and don't convert two i32 to i64? Could I use MyTargetInstrInfo::copyRegToReg() to handle this logic issue? 3. Maybe I can study INSERT_SUBREG/EXTRACT_SUBREG at X86 porting file. I will do some research more deeply. I think the best way is that TableGen has register pair TypeProfile feature. :( But I find i64 data will not be ex --- 09年2月20日,周五, Evan Cheng <echeng at apple.com> 写道: 发件人: Evan Cheng <echeng at apple.com> 主题: Re: [LLVMdev] help: about how to use tblgen to constraint operand. 收件人: hbrenkun at yahoo.cn, "LLVM Developers Mailing List" &lt...
2009 Feb 20
0
[LLVMdev] help: about how to use tblgen to constraint operand.
...pyRegToReg only supports copying registers of the same (or compatible register classes). > > > 3. Maybe I can study INSERT_SUBREG/EXTRACT_SUBREG at X86 porting file. Yes. > > > I will do some research more deeply. I think the best way is that > TableGen has register pair TypeProfile feature. :( It's not a tablegen issue. It's easy to add the constraint to tablegen but the register allocator has to be able to allocate register pairs. That is definitely not a trivial task. Evan > > > > > > But I find i64 data will not be ex > --- 09年2月20日,周五,...
2009 Mar 30
1
[LLVMdev] Dear Evan Chang, Re: help: about how to use tblgen to constraint operand.
...) to handle this logic issue? No. copyRegToReg only supports copying registers of the same (or compatible register classes). 3. Maybe I can study INSERT_SUBREG/EXTRACT_SUBREG at X86 porting file. Yes. I will do some research more deeply. I think the best way is that TableGen has register pair TypeProfile feature. :( It's not a tablegen issue. It's easy to add the constraint to tablegen but the register allocator has to be able to allocate register pairs. That is definitely not a trivial task. Evan But I find i64 data will not be ex --- 09年2月20日,周五, Evan Cheng <echeng at apple.com&...
2009 Mar 31
1
[LLVMdev] 转发: Re: Dear Evan Chang, Re: help: about how to use tblgen to constraint operand.
...) to handle this logic issue? No. copyRegToReg only supports copying registers of the same (or compatible register classes). 3. Maybe I can study INSERT_SUBREG/EXTRACT_SUBREG at X86 porting file. Yes. I will do some research more deeply. I think the best way is that TableGen has register pair TypeProfile feature. :( It's not a tablegen issue. It's easy to add the constraint to tablegen but the register allocator has to be able to allocate register pairs. That is definitely not a trivial task. Evan But I find i64 data will not be ex --- 09年2月20日,周五, Evan Cheng <echeng at apple.com...
2014 Jul 18
2
[LLVMdev] how to define INTRINSIC_W_CHAIN
sure! class TEST_INTINSIC_FM< string asmstr> : Intrinsic <llvm_i32_ty], [llvm_i32_ty, llvm_ptr_ty], [IntrReadWriteArgMem], !strconcat(“llvm.test”, asmstr),”.float”) >; tks On Jul 18, 2014, at 4:06 PM, Tom Stellard <tom at stellard.net> wrote: > On Fri, Jul 18, 2014 at 03:19:47PM -0400, kewuzhang wrote: >> en! >> >> my test is : %r1 =