Displaying 5 results from an estimated 5 matches for "type04".
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type00
2017 Apr 10
0
[PATCH 04/11] nvkm/ramgt215: Move ram training up the chain
..._ram_get(struct nvkm_ram *, u64, u32, u32, u32, struct nvkm_mem **);
void gf100_ram_put(struct nvkm_ram *, struct nvkm_mem **);
+/* Training */
+struct gt215_ram_train {
+ u16 mask;
+ struct nvbios_M0209S remap;
+ struct nvbios_M0209S type00;
+ struct nvbios_M0209S type01;
+ struct nvbios_M0209S type04;
+ struct nvbios_M0209S type06;
+ struct nvbios_M0209S type07;
+ struct nvbios_M0209S type08;
+ struct nvbios_M0209S type09;
+};
+int gt215_ram_train_type(struct nvkm_ram *ram, int i, u8 ramcfg,
+ struct gt215_ram_train *train);
+int gf100_ram_train_init(struct nvkm_ram *ram);
+
int gk104_...
2017 Apr 10
0
[PATCH 05/11] nvkm/ramgf100: Don't mandate training pattern 4
...a\n");
return -EINVAL;
}
@@ -575,10 +575,13 @@ gf100_ram_train_init_0(struct nvkm_ram *ram, struct gt215_ram_train *train)
}
}
- for (j = 0; j < 8; j += 4) {
- for (i = 0; i < 0x100; i++) {
- nvkm_wr32(device, 0x10f968 + j, i);
- nvkm_wr32(device, 0x10f900 + j, train->type04.data[i]);
+ if (train->mask & 0x10) {
+ for (j = 0; j < 8; j += 4) {
+ for (i = 0; i < 0x100; i++) {
+ nvkm_wr32(device, 0x10f968 + j, i);
+ nvkm_wr32(device, 0x10f900 + j,
+ train->type04.data[i]);
+ }
}
}
--
2.9.3
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern upload routines from GK104+ now shared with GT215+
- Timing calculation for Fermi
- GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that
pesky GT 240.
- A routine to translate a VBIOS init
2017 Apr 10
14
RESEND Preparations for Fermi DRAM clock changes
Two patches went missing as a result of PEBCAK. No v2 marks as nothing
changed really. Just resending for easier enforcement of patch order
in other people's trees. Sorry for the noise.
Original message:
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern
2017 Apr 10
0
[PATCH 08/11] nvkm/ramgt215: Add train ptrn upload for GDDR5
...rs/gpu/drm/nouveau/nvkm/subdev/fb/ram.h
index ce8a98e..ef9edc5 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.h
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.h
@@ -32,6 +32,7 @@ struct gt215_ram_train {
struct nvbios_M0209S type00;
struct nvbios_M0209S type01;
struct nvbios_M0209S type04;
+ struct nvbios_M0209S type05;
struct nvbios_M0209S type06;
struct nvbios_M0209S type07;
struct nvbios_M0209S type08;
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c
index 6abd0e3..fa85942 100644
--- a/drivers/gpu/drm/nouveau...