search for: twoaddressinstructionpass

Hi, It seems to me that the TwoAddressInstructionPass::runOnMachineFunction method has some problems when the tied destination register has a subReg. The two changes below improves the situation for me but I'm all new to this so I'm not sure how it's supposed to work. I'm running on 2.9. Any comments? @@ -1172,12 +1172,20 @@ bool...

...ME: Once TwoAddressInstruction pass no longer uses kill flags, // LiveVariables can be removed completely, and LiveIntervals can be directly // computed. (We still either need to regenerate kill flags after regalloc, or // preferably fix the scavenger to not depend on them). When looking in TwoAddressInstructionPass.cpp it looks like the pass only use/update LV when there is no LIS. And there seems to be an experimental -early-live-intervals option to calculcate LIS before TwoAddressInstructionPass. I also noticed that the -early-live-intervals option was added back in 2012. So I assume that the plans to repl...

...reg1028<def> = sextb_r %reg1028 ... %reg1030<def> = sextw_r %reg1026<kill> prepend: %reg1030<def> = mov_rr %reg1026<kill> rewrite to: %reg1030<def> = sextw_r %reg1030 Because sextb_r and sextw_r have destination tied to source operands, TwoAddressInstructionPass thinks it needs a copy. However, since the sext kills its source, the copy is unnecessary. Why does this happen? Is TwoAddressInstructionPass relying on a later pass to notice this and transform it again? G

Dan Gohman wrote: > On Apr 19, 2009, at 6:15 PM, Greg McGary wrote: > >> Because sextb_r and sextw_r have destination tied to source operands, >> TwoAddressInstructionPass thinks it needs a copy. However, since the >> sext kills its source, the copy is unnecessary. Why does this happen? >> Is TwoAddressInstructionPass relying on a later pass to notice this >> and >> transform it again? >> > > Yes, the later pass is the coa...

I discovered I needed: Index: lib/CodeGen/TwoAddressInstructionPass.cpp =================================================================== --- lib/CodeGen/TwoAddressInstructionPass.cpp (revision 71041) +++ lib/CodeGen/TwoAddressInstructionPass.cpp (working copy) @@ -935,6 +935,7 @@ ++NumReMats; } else { bool Emitted = TII-&g...

Hi, I have cases of instruction pairs, where one is cheaper 2-address, and the other 3-address. I would like to select the 2-addr instruction during isel, but use the 3-addr instruction to avoid a copy if possible. I find that TwoAddressInstructionPass::isProfitableToConv3Addr() is only checking for the case of a physreg copy, and so leaves the majority of cases as they are (2-address). I would like to say "If 3-addr version would avoid a copy, use it!". Does anyone else have a similar situation? To do this, one would need to check...

On Apr 19, 2009, at 6:15 PM, Greg McGary wrote: > > Because sextb_r and sextw_r have destination tied to source operands, > TwoAddressInstructionPass thinks it needs a copy. However, since the > sext kills its source, the copy is unnecessary. Why does this happen? > Is TwoAddressInstructionPass relying on a later pass to notice this > and > transform it again? Yes, the later pass is the coalescer. It would be worthwhile to under...

Hi Jonas, Thanks for bringing that up. > On Nov 30, 2017, at 4:04 AM, Jonas Paulsson via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Hi, > > we are in the midst of an interesting work that begun with setting 'guessInstructionProperties = 0' in the SystemZ backend. We have found this to be useful, and discovered many instructions where the hasSideEffects flag

...m-dev at lists.llvm.org> wrote: >> >> Hi, >> >> I have cases of instruction pairs, where one is cheaper 2-address, and the other 3-address. I would like to select the 2-addr instruction during isel, but use the 3-addr instruction to avoid a copy if possible. I find that TwoAddressInstructionPass::isProfitableToConv3Addr() is only checking >> for the case of a physreg copy, and so leaves the majority of cases as they are (2-address). >> >> I would like to say "If 3-addr version would avoid a copy, use it!". Does anyone else have a similar situation? > > I...

Where is the liveness analysis pass? I have been looking for days but cannot find anything. I just want to know transfer variables in and out of basic blocks, that are calculated using simple data flow equations. Thanks! -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180920/529bce15/attachment.html>

On Apr 21, 2009, at 4:02 PM, Greg McGary wrote: > Dan Gohman wrote: >> On Apr 19, 2009, at 6:15 PM, Greg McGary wrote: >> >>> Because sextb_r and sextw_r have destination tied to source >>> operands, >>> TwoAddressInstructionPass thinks it needs a copy. However, since >>> the >>> sext kills its source, the copy is unnecessary. Why does this >>> happen? >>> Is TwoAddressInstructionPass relying on a later pass to notice this >>> and >>> transform it again? >>&g...

...quainted with LLVM, and C++ So, if I want to add machine dependent passes, for example, for the X86, I have to add them in the X86TargetMachine.cpp file, is it right? I am a little confused about where to register passes, though. For instance, the passes "phi-node-elimination", and "TwoAddressInstructionPass" are registered in TwoAddressInstructionPass.cpp and PHIElimination.cpp, but what does determine that the PHI elimination pass is executed first? Also, why the register allocation pass is added directly to the pass manager in X86TargetMachine, and the same does not happen to the PHI eliminatio...

Hi, we are in the midst of an interesting work that begun with setting 'guessInstructionProperties = 0' in the SystemZ backend. We have found this to be useful, and discovered many instructions where the hasSideEffects flag was incorrectly set while it actually shouldn't. The attached patch and test case triggers an assert in TwoAddress.  (bin/llc ./tc_TwoAddr_crash.ll

...movsbl (%eax), %ecx movsbl 1(%eax), %eax addl %ecx, %ecx imull %ecx, %eax movl %eax, 4(%esp) movl $.str_1, (%esp) call printf #IMPLICIT_DEF %eax addl $12, %esp ret .size main, .-main On the other hand, if I use the TwoAddressInstructionPass, then llvm produces this code here: FNSTCW16m := MOV8mi := FLDCW16m := MOV32rm EAX := MOV32rm EAX := EAX MOVSX32rm8 ECX := EAX MOVSX32rm8 EAX := EAX ADJCALLSTACKDOWN := ADD32rr EC...

...a := c 2) a := a op c --> a := c 3) a := b op a --> a := a op b --> a := b (???) What if the operation in (3) is non-commutative? Thanks a lot, Fernando > On Mon, 26 Jun 2006, Fernando Magno Quintao Pereira wrote: > > The problem is that, after the TwoAddressInstructionPass is used, the > > code is no longer in SSA form, and my register allocator rely on > > some SSA properties. I am using the Spiller in VirtRegMap.* to generate > > the code, but the incorrect mapping still happens when I invoke the > > setReg() method directly on machine opera...

...(SkipDebug && Op->isDebug()))) Op = getNextOperandForReg(Op); } } public: But of course then other tests fail. For example: build-all/./bin/llc < test/CodeGen/R600/literals.ll -march=r600 -mcpu=redwood gives llc: ../lib/CodeGen/TwoAddressInstructionPass.cpp:684: void (anonymous namespace)::TwoAddressInstructionPass::scanUses(unsigned int): Assertion `SrcRegMap[NewReg] == Reg && "Can't map to two src registers!"' failed. So I suppose there are assumptions that defusechain_instr_iterator ignores implicit sub register us...

...028 > ... > %reg1030<def> = sextw_r %reg1026<kill> > prepend: %reg1030<def> = mov_rr %reg1026<kill> > rewrite to: %reg1030<def> = sextw_r %reg1030 > > Because sextb_r and sextw_r have destination tied to source operands, > TwoAddressInstructionPass thinks it needs a copy. However, since the > sext kills its source, the copy is unnecessary. Why does this happen? > Is TwoAddressInstructionPass relying on a later pass to notice this and > transform it again? > Since no one responded, I'll assume that this situation doesn...

With a modified copy of LLVM (so it's probably my fault) I'm getting an assertion failure because isTwoAddrUse (in TwoAddressInstructionPass.cpp) is being called with a MachineInstr MI such that MI.getNumOperands() is 2, but MI.getDesc().getNumOperands() is 5. The assertion fails when that function calls MI.getOperand(2). My question is: is isTwoAddrUse doing the right thing here? static bool isTwoAddrUse(MachineInstr &MI, unsigne...

...to run on > > machine code. Why it has not been originally implemented to run on > > machine code? > > I'm not sure what you mean. It definitely does run on machine code. I was thinking that it only transformed instructions with virtual registers because of this code in the TwoAddressInstructionPass.cpp: unsigned regA = mi->getOperand(0).getReg(); unsigned regB = mi->getOperand(1).getReg(); assert(MRegisterInfo::isVirtualRegister(regA) && MRegisterInfo::isVirtualRegister(regB) && "cannot update physical register...

Dear guys, I need help fixing a little piece of code. I have a pass that I really want to execute after the TwoAddressinstructionPass. But if I write "AU.addRequiredID(TwoAddressInstructionPassID);" in my pass' getAnalysisUsage, I end up getting the infamous: PassManagerT.h:387: failed assertion `getAnalysisOrNullUp(P) && dynamic_cast<ImmutablePass*>(getAnalysisOrNullUp(P)) && "Pass a...