search for: tunk_base

...c @@ -73,7 +73,8 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq, struct nouveau_fb *pfb = nouveau_fb(device); struct nouveau_drm *drm = nouveau_drm(dev); struct bit_entry P; - uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tmp7_3; + uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tUnk_3_2; + int tUNK_base; if (bit_table(dev, 'P', &P)) return -EINVAL; @@ -91,6 +92,11 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq, break; } + tUnk_3_2 = (boot->reg[3] & 0x00ff0000) >> 16; + if(tUnk_3_2 == 0) { + tUnk_3_2 = 0x16; + } + t->reg[0] = (e->tRP <&lt...

...ng_calc(struct drm_device *dev, u32 freq, > struct nouveau_fb *pfb = nouveau_fb(device); > struct nouveau_drm *drm = nouveau_drm(dev); > struct bit_entry P; > - uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tmp7_3; > + uint8_t unk18 = 1, unk20 = 0, unk21 = 0, tUnk_3_2; > + int tUNK_base; > > if (bit_table(dev, 'P', &P)) > return -EINVAL; > @@ -91,6 +92,11 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq, > break; > } > > + tUnk_3_2 = (boot->reg[3] & 0x00ff0000) >> 16; > + if(tUnk_3_2 == 0) { > + tU...

v2: style fixes Signed-off-by: Roy Spliet <r.spliet at student.tudelft.nl> --- drivers/gpu/drm/nouveau/nouveau_drv.h | 2 +- drivers/gpu/drm/nouveau/nouveau_mem.c | 25 +++++++++++++++++++------ 2 files changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index b8fa77d..fe242a3 100644 ---

Following a series of patches that implement memory reclocking for NVA3/5/8 with DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics cards, but I expect reclocking now to work on many more. Testers can pick up these patches and test it by enabling pstate (nouveau.pstate=1). They should then be able to change clocks by writing to /sys/class/drm/card0/device/pstate. Correct