Displaying 20 results from an estimated 84 matches for "ttm_pl_flag_vram".
2012 Feb 03
3
[PATCH 1/4] nouveau: Allow allocating BOs at specific offsets
...2f6daae..3577e04 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -573,7 +573,7 @@ nouveau_fence_init(struct drm_device *dev)
/* Create a shared VRAM heap for cross-channel sync. */
if (USE_SEMA(dev)) {
- ret = nouveau_bo_new(dev, size, 0, TTM_PL_FLAG_VRAM,
+ ret = nouveau_bo_new(dev, 0, size, 0, TTM_PL_FLAG_VRAM,
0, 0, &dev_priv->fence.bo);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 7ce3fde..c300e36 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+...
2010 Mar 18
0
[PATCH] drm/nouveau: Make use of TTM busy_placements.
...et = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
@@ -172,26 +172,33 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
return 0;
}
+static void
+set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags)
+{
+ *n = 0;
+
+ if (type & TTM_PL_FLAG_VRAM)
+ pl[(*n)++] = TTM_PL_FLAG_VRAM | flags;
+ if (type & TTM_PL_FLAG_TT)
+ pl[(*n)++] = TTM_PL_FLAG_TT | flags;
+ if (type & TTM_PL_FLAG_SYSTEM)
+ pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags;
+}
+
void
-nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t memtype)
+nouveau_bo_placement_...
2012 Nov 25
0
[PATCH] drm/nouveau: unpin various bo's before destroying
...(nv_crtc->cursor.nvbo);
nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
kfree(nv_crtc);
}
@@ -1056,8 +1057,11 @@ nv04_crtc_create(struct drm_device *dev, int crtc_num)
0, 0x0000, NULL, &nv_crtc->cursor.nvbo);
if (!ret) {
ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
- if (!ret)
+ if (!ret) {
ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
+ if (ret)
+ nouveau_bo_unpin(nv_crtc->cursor.nvbo);
+ }
if (ret)
nouveau_bo_ref(NULL, &nv_crtc->cursor.nvbo);
}
diff --git a/drivers/gpu/drm/nouveau/nv10_fence.c b/drivers/gpu/drm/nouveau/nv10...
2009 Aug 19
1
[PATCH] drm/nouveau: Add a MM for mappable VRAM that isn't usable as scanout.
...0644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -68,8 +68,11 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
nvbo->tile_mode = tile_mode;
nvbo->tile_flags = tile_flags;
- if (!nvbo->mappable && (flags & TTM_PL_FLAG_VRAM))
- flags |= TTM_PL_FLAG_PRIV0;
+ if (flags & TTM_PL_FLAG_VRAM) {
+ flags |= TTM_PL_FLAG_PRIV1;
+ if (!nvbo->mappable)
+ flags |= TTM_PL_FLAG_PRIV0;
+ }
/* Some of the tile_flags have a periodic structure of 24*4096 bytes,
* align to to that as well as the page size. Overallocat...
2009 Aug 02
3
[PATCH 1/4] drm/nouveau: refactor VGA font save/restore
Remove drm_nouveau_private::fb member and map the piece of VRAM only
when accessing VGA fonts.
Collect copied code into the static function nouveau_vga_font_io().
Signed-off-by: Pekka Paalanen <pq at iki.fi>
---
drivers/gpu/drm/nouveau/nouveau_drv.h | 17 -------
drivers/gpu/drm/nouveau/nouveau_hw.c | 75 +++++++++++++++----------------
drivers/gpu/drm/nouveau/nouveau_state.c |
2019 Aug 14
2
[Intel-gfx] [PATCH v6 08/17] drm/ttm: use gem vma_node
...crtc.c
index f22f01020625..5640f5e45c11 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
@@ -1366,7 +1366,7 @@ nv04_crtc_create(struct drm_device *dev, int crtc_num)
ret = nouveau_bo_new(&nouveau_drm(dev)->client, 64*64*4, 0x100,
TTM_PL_FLAG_VRAM, 0, 0x0000, NULL, NULL,
- &nv_crtc->cursor.nvbo);
+ false, &nv_crtc->cursor.nvbo);
if (!ret) {
ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, false);
if (!ret) {
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispn...
2020 Feb 06
0
[PATCH 3/4] drm/nouveau: Remove field nvbo from struct nouveau_framebuffer
...ct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->primary->fb);
+ struct drm_framebuffer *fb = crtc->primary->fb;
+ struct nouveau_bo *nvbo = nouveau_gem_object(fb->obj[0]);
struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
int ret;
- ret = nouveau_bo_pin(nvfb->nvbo, TTM_PL_FLAG_VRAM, false);
+ ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM, false);
if (ret == 0) {
if (disp->image[nv_crtc->index])
nouveau_bo_unpin(disp->image[nv_crtc->index]);
- nouveau_bo_ref(nvfb->nvbo, &disp->image[nv_crtc->index]);
+ nouveau_bo_ref(nvbo, &disp->image[...
2018 Dec 19
0
[PATCH 10/14] drm/bochs: drop unused gpu_addr arg from bochs_bo_pin()
.../bochs_fbdev.c b/drivers/gpu/drm/bochs/bochs_fbdev.c
index d9f3d42999..92feb817ff 100644
--- a/drivers/gpu/drm/bochs/bochs_fbdev.c
+++ b/drivers/gpu/drm/bochs/bochs_fbdev.c
@@ -81,7 +81,7 @@ static int bochsfb_create(struct drm_fb_helper *helper,
if (ret)
return ret;
- ret = bochs_bo_pin(bo, TTM_PL_FLAG_VRAM, NULL);
+ ret = bochs_bo_pin(bo, TTM_PL_FLAG_VRAM);
if (ret) {
DRM_ERROR("failed to pin fbcon\n");
ttm_bo_unreserve(&bo->bo);
diff --git a/drivers/gpu/drm/bochs/bochs_kms.c b/drivers/gpu/drm/bochs/bochs_kms.c
index 85dd268fa1..a1a0129f3e 100644
--- a/drivers/gpu/drm/bochs/b...
2020 May 07
0
GeForce(R) GT 710 1GB PCIE x 1 on arm64
...for the
> > > > > > notifier, which should cause nouveau_bo to do the right thing (by
> > > > > > setting force_coherent=true in this environment):
> > > > > >
> > > > > > ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
> > > > > > 0, 0x0000, NULL, NULL, &disp->sync);
> > > > > >
> > > > > > Milan - can you try changing that line in
> > > > > >
> > > > > > drivers/gpu/drm/nouveau/dispnv50/disp.c::nv50_display_cre...
2015 Jan 24
1
[PATCH 1/6] make RAM device optional
...zalloc(sizeof(*priv), GFP_KERNEL);
> @@ -231,10 +232,12 @@ nv84_fence_create(struct nouveau_drm *drm)
> priv->base.context_base = fence_context_alloc(priv->base.contexts);
> priv->base.uevent = true;
>
> + domain = nvxx_fb(&drm->device)->ram ? TTM_PL_FLAG_VRAM : TTM_PL_FLAG_TT;
> ret = nouveau_bo_new(drm->dev, 16 * priv->base.contexts, 0,
> - TTM_PL_FLAG_VRAM, 0, 0, NULL, NULL, &priv->bo);
> + domain | TTM_PL_FLAG_UNCACHED,
And the TTM_PL_FLAG_UNCACHED here.
Are those in...
2019 Apr 09
0
[PATCH 12/15] drm/vboxvideo: Convert vboxvideo driver to |struct drm_gem_ttm_object|
...u32 pitch;
>
> mode_cmd.width = sizes->surface_width;
> @@ -75,9 +75,9 @@ int vboxfb_create(struct drm_fb_helper *helper,
> if (ret)
> return ret;
>
> - bo = gem_to_vbox_bo(gobj);
> + gbo = drm_gem_ttm_of_gem(gobj);
>
> - ret = vbox_bo_pin(bo, TTM_PL_FLAG_VRAM);
> + ret = drm_gem_ttm_pin(gbo, TTM_PL_FLAG_VRAM);
> if (ret)
> return ret;
>
> @@ -86,7 +86,7 @@ int vboxfb_create(struct drm_fb_helper *helper,
> return PTR_ERR(info);
>
> info->screen_size = size;
> - info->screen_base = (char __iomem *)vbox_...
2020 Feb 10
2
[PATCH] drm/nouveau: Fix NULL ptr access in nv50_wndw_prepare_fb()
...u_bo *nvbo;
struct nv50_head_atom *asyh;
struct nv50_wndw_ctxdma *ctxdma;
int ret;
@@ -499,6 +499,7 @@ nv50_wndw_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state)
if (!asyw->state.fb)
return 0;
+ nvbo = nouveau_gem_object(fb->obj[0]);
ret = nouveau_bo_pin(nvbo, TTM_PL_FLAG_VRAM, true);
if (ret)
return ret;
--
2.17.1
2019 Aug 05
2
[PATCH v6 08/17] drm/ttm: use gem vma_node
Drop vma_node from ttm_buffer_object, use the gem struct
(base.vma_node) instead.
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
Reviewed-by: Christian K?nig <christian.koenig at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
drivers/gpu/drm/qxl/qxl_object.h | 2 +-
drivers/gpu/drm/radeon/radeon_object.h | 2 +-
drivers/gpu/drm/virtio/virtgpu_drv.h
2019 Aug 05
2
[PATCH v6 08/17] drm/ttm: use gem vma_node
Drop vma_node from ttm_buffer_object, use the gem struct
(base.vma_node) instead.
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
Reviewed-by: Christian K?nig <christian.koenig at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
drivers/gpu/drm/qxl/qxl_object.h | 2 +-
drivers/gpu/drm/radeon/radeon_object.h | 2 +-
drivers/gpu/drm/virtio/virtgpu_drv.h
2019 Aug 05
2
[PATCH v6 08/17] drm/ttm: use gem vma_node
Drop vma_node from ttm_buffer_object, use the gem struct
(base.vma_node) instead.
Signed-off-by: Gerd Hoffmann <kraxel at redhat.com>
Reviewed-by: Christian K?nig <christian.koenig at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 2 +-
drivers/gpu/drm/qxl/qxl_object.h | 2 +-
drivers/gpu/drm/radeon/radeon_object.h | 2 +-
drivers/gpu/drm/virtio/virtgpu_drv.h
2020 Feb 06
5
[PATCH 0/4] drm/nouveau: Remove struct nouveau_framebuffer
All fields in struct nouveau_framebuffer appear to be obsolete. The
data structure can be replaced by struct drm_framebuffer entirely.
Patch 1 removes several unused fields from struct nouveau_framebuffer.
Patch 2 moves the field vma to struct nouveau_fbdev. The information
in vma is only relevant for fbdev emulation, and as such he field is
only used there.
Patch 3 removes nvbo from struct
2018 Dec 06
0
[PATCH 1/3] drm/qxl: allow both PRIV and VRAM placement for QXL_GEM_DOMAIN_SURFACE
...58,10 +58,10 @@ void qxl_ttm_placement_from_domain(struct qxl_bo *qbo, u32 domain, bool pinned)
qbo->placement.placement = qbo->placements;
qbo->placement.busy_placement = qbo->placements;
- if (domain == QXL_GEM_DOMAIN_VRAM)
- qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
if (domain == QXL_GEM_DOMAIN_SURFACE)
qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV | pflag;
+ if (domain == QXL_GEM_DOMAIN_SURFACE || domain == QXL_GEM_DOMAIN_VRAM)
+ qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
if (domain...
2018 Dec 12
0
[PATCH v2 07/18] drm/qxl: allow both PRIV and VRAM placement for QXL_GEM_DOMAIN_SURFACE
...xl_object.c
+++ b/drivers/gpu/drm/qxl/qxl_object.c
@@ -60,8 +60,10 @@ void qxl_ttm_placement_from_domain(struct qxl_bo *qbo, u32 domain, bool pinned)
qbo->placement.busy_placement = qbo->placements;
if (domain == QXL_GEM_DOMAIN_VRAM)
qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
- if (domain == QXL_GEM_DOMAIN_SURFACE)
+ if (domain == QXL_GEM_DOMAIN_SURFACE) {
qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_PRIV | pflag;
+ qbo->placements[c++].flags = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_VRAM | pflag;
+ }
if (domain == QXL_GEM_DOMAIN_CPU)
q...
2011 Nov 06
1
[PATCH] drm/nv10: disable perf hack on low memory cards
...bo.c
index 7226f41..a692648 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -148,6 +148,7 @@ set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
if (dev_priv->card_type == NV_10 &&
nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) &&
+ dev_priv->vram_size >= 32 * 1024 * 1024 &&
nvbo->bo.mem.num_pages < vram_pages / 2) {
/*
* Make sure that the color and depth buffers are handled
--
1.7.7
2015 Feb 17
0
[PATCH v3 1/6] make RAM device optional
...->fence = kzalloc(sizeof(*priv), GFP_KERNEL);
@@ -231,10 +232,17 @@ nv84_fence_create(struct nouveau_drm *drm)
priv->base.context_base = fence_context_alloc(priv->base.contexts);
priv->base.uevent = true;
- ret = nouveau_bo_new(drm->dev, 16 * priv->base.contexts, 0,
- TTM_PL_FLAG_VRAM, 0, 0, NULL, NULL, &priv->bo);
+ domain = nvxx_fb(&drm->device)->ram ?
+ TTM_PL_FLAG_VRAM :
+ /*
+ * fences created in TT must be coherent or we will
+ * wait on old CPU cache values!
+ */
+ TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED;
+ ret = nouveau_bo_new(drm->...