search for: tta

My parallel code is running slower than my non-parallel code! Can someone pls advise what am I doing wrong here? t and tTA are simple matrices of equal dimensions. #NON PARALLEL CODE nCols=ncol(t) nRows=nrow(t) tTA = matrix(nrow=nRows,ncol=nCols) require(TTR) system.time( for (i in 1:nCols) { x = t[,i] xROC = ROC(x) tTA[,i]=xROC } ) user system elapsed 123.24 0.07 123.47 # PARALLEL CODE nCols=nc...

TTA-Based Codesign Environment (TCE) v1.3 released -------------------------------------------------- TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable...

TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). TTA is a minimalistic processor architecture template that allows high level of control for the designer to choose the boundary between the hardware...

TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). TTA is a minimalistic processor architecture template that allows high level of control for the designer to choose the boundary between the hardware...

Announcing the Release of TTA-Based Codesign Environment (TCE) v1.2 TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). The toolset provides a complete codesign flow from C programs down to synthesizable VHDL and parallel pro...

Hello LLVM people, Our customizable TTA target [1] is capable of having plenty of registers and register file ports to improve instruction level parallelism and reduce spills. It's totally up to the designer of the particular TTA processor how much the processor has registers and register file resources along with other TTA component...

TTA-based Co-design Environment (TCE) is a toolset for designing application-specific processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable VHDL and parallel program binaries. P...

TTA-based Co-design Environment (TCE) is a toolset for design and programming of low power customized processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable processor RTL (VHDL a...

TTA-based Co-design Environment (TCE) is a toolset for design and programming of low power customized processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable processor RTL (VHDL a...

TTA-Based Co-design Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from C programs down to synthesizable VHDL and parallel program binaries. Processor cus...

Hello, Attached is a trivial patch to increase the max number of physical registers in LLVM from 1024 to 16384. In our TCE toolset we allow the designer to choose the number of registers in the designed TTA processors freely, and recently while experimenting with using TTA for a GPU design we have bumped int...

On Nov 5, 2007, at 2:55 AM, Pekka Jääskeläinen wrote: > Hello LLVM people, > > Our customizable TTA target [1] is capable of having plenty of > registers > and register file ports to improve instruction level parallelism and > reduce spills. It's totally up to the designer of the particular TTA > processor how much the processor has registers and register file > resources &...

Hello, Can someone please commit this patch? Thanks. On 11/21/2009 11:15 PM, Pekka Jääskeläinen wrote: > Hello, > > Attached is a trivial patch to increase the max number of physical > registers in LLVM from 1024 to 16384. > > In our TCE toolset we allow the designer to choose the number of > registers in the designed TTA processors freely, and recently > while experimenting with using TTA for a GPU...

TTA-based Co-design Environment (TCE) v1.6 released --------------------------------------------------- TTA-based Co-design Environment (TCE) is a toolset for designing application-specific processors based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-...

Hi all, I think this master's thesis from our group could be of interest. It describes the "bridge" between the LLVM codegen and our custom TTA codegen in TCE: a runtime retargetable architecture description file driven LLVM compiler backend. The thesis might be useful also for people implementing backends for LLVM in general. http://tce.cs.tut.fi/doc/Compiler.pdf If you have any questions or comments, please direct them to me (I'm n...

On Nov 5, 2007, at 2:55 AM, Pekka Jääskeläinen wrote: > Hello LLVM people, > > Our customizable TTA target [1] is capable of having plenty of > registers > and register file ports to improve instruction level parallelism and > reduce spills. It's totally up to the designer of the particular TTA > processor how much the processor has registers and register file > resources &...

hi guys I need to get llvm to support vliw architecture. Can you please point me in the right direction. we have managed to get it to compile into simple assemble and now need it to be able to schedule the instructions in parrallel. any help would be appreciated Regards Junior

Hi, Would it be possible to set tbgen to be installed with llvm? For our project http://llvm.org/ProjectsWithLLVM/#tta-tce it would be very helpful, because our tools generate compiler backend plugins in the fly for each customized processor and plugin generation needs tbgen for handling td files. Because of tbgen not beeing distributed, our users cannot use llvm from their favorite distribution packages,...

I am trying to get remote extensions to work correctly with agents. I have ackcall=yes and have agents logged in to extension 101 using agentcallbacklogin with extension 101 defined as: exten => 101,1,Dial(Zap/3/18165551234,20,tTA(custom/presspoundtoanswer)) This setup works great on local and/or voip channels, but on zap channels, the zap channel answers immediately as soon as it goes off hook and the announcement gets played long before the agent gets a chance to answer their phone. Is there a way to either delay the...

On May 4, 2009, at 11:03 PM, Mikael Lepistö wrote: > Hi, > > Would it be possible to set tbgen to be installed with llvm? For our > project http://llvm.org/ProjectsWithLLVM/#tta-tce it would be very > helpful, because our tools generate compiler backend plugins in the > fly for each customized processor and plugin generation needs tbgen > for handling td files. Sure, would you care to prepare a patch? -Chris > > Because of tbgen not beeing distribut...