search for: trylocks

Displaying 20 results from an estimated 224 matches for "trylocks".

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2014 Jun 17
3
[PATCH 04/11] qspinlock: Extract out the exchange of tail code word
On Sun, Jun 15, 2014 at 02:47:01PM +0200, Peter Zijlstra wrote: > From: Waiman Long <Waiman.Long at hp.com> > > This patch extracts the logic for the exchange of new and previous tail > code words into a new xchg_tail() function which can be optimized in a > later patch. And also adds a third try on acquiring the lock. That I think should be a seperate patch. And instead of
2014 Jun 17
3
[PATCH 04/11] qspinlock: Extract out the exchange of tail code word
On Sun, Jun 15, 2014 at 02:47:01PM +0200, Peter Zijlstra wrote: > From: Waiman Long <Waiman.Long at hp.com> > > This patch extracts the logic for the exchange of new and previous tail > code words into a new xchg_tail() function which can be optimized in a > later patch. And also adds a third try on acquiring the lock. That I think should be a seperate patch. And instead of
2014 Jun 18
3
[PATCH 04/11] qspinlock: Extract out the exchange of tail code word
On Wed, Jun 18, 2014 at 01:37:45PM +0200, Paolo Bonzini wrote: > Il 17/06/2014 22:55, Konrad Rzeszutek Wilk ha scritto: > >On Sun, Jun 15, 2014 at 02:47:01PM +0200, Peter Zijlstra wrote: > >>From: Waiman Long <Waiman.Long at hp.com> > >> > >>This patch extracts the logic for the exchange of new and previous tail > >>code words into a new
2014 Jun 18
3
[PATCH 04/11] qspinlock: Extract out the exchange of tail code word
On Wed, Jun 18, 2014 at 01:37:45PM +0200, Paolo Bonzini wrote: > Il 17/06/2014 22:55, Konrad Rzeszutek Wilk ha scritto: > >On Sun, Jun 15, 2014 at 02:47:01PM +0200, Peter Zijlstra wrote: > >>From: Waiman Long <Waiman.Long at hp.com> > >> > >>This patch extracts the logic for the exchange of new and previous tail > >>code words into a new
2014 Jun 18
0
[PATCH 04/11] qspinlock: Extract out the exchange of tail code word
Il 17/06/2014 22:55, Konrad Rzeszutek Wilk ha scritto: > On Sun, Jun 15, 2014 at 02:47:01PM +0200, Peter Zijlstra wrote: >> From: Waiman Long <Waiman.Long at hp.com> >> >> This patch extracts the logic for the exchange of new and previous tail >> code words into a new xchg_tail() function which can be optimized in a >> later patch. > > And also adds a
2014 May 08
1
[PATCH v10 03/19] qspinlock: Add pending bit
On Wed, May 07, 2014 at 11:01:31AM -0400, Waiman Long wrote: > +/** > + * trylock_pending - try to acquire queue spinlock using the pending bit > + * @lock : Pointer to queue spinlock structure > + * @pval : Pointer to value of the queue spinlock 32-bit word > + * Return: 1 if lock acquired, 0 otherwise > + */ > +static inline int trylock_pending(struct qspinlock *lock, u32
2014 May 08
1
[PATCH v10 03/19] qspinlock: Add pending bit
On Wed, May 07, 2014 at 11:01:31AM -0400, Waiman Long wrote: > +/** > + * trylock_pending - try to acquire queue spinlock using the pending bit > + * @lock : Pointer to queue spinlock structure > + * @pval : Pointer to value of the queue spinlock 32-bit word > + * Return: 1 if lock acquired, 0 otherwise > + */ > +static inline int trylock_pending(struct qspinlock *lock, u32
2017 Apr 20
1
[PATCH net-next v2 2/5] virtio-net: transmit napi
>> static int xmit_skb(struct send_queue *sq, struct sk_buff *skb) >> { >> struct virtio_net_hdr_mrg_rxbuf *hdr; >> @@ -1130,9 +1172,11 @@ static netdev_tx_t start_xmit(struct sk_buff *skb, >> struct net_device *dev) >> int err; >> struct netdev_queue *txq = netdev_get_tx_queue(dev, qnum); >> bool kick =
2017 Apr 20
1
[PATCH net-next v2 2/5] virtio-net: transmit napi
>> static int xmit_skb(struct send_queue *sq, struct sk_buff *skb) >> { >> struct virtio_net_hdr_mrg_rxbuf *hdr; >> @@ -1130,9 +1172,11 @@ static netdev_tx_t start_xmit(struct sk_buff *skb, >> struct net_device *dev) >> int err; >> struct netdev_queue *txq = netdev_get_tx_queue(dev, qnum); >> bool kick =
2014 Jun 18
0
[PATCH 04/11] qspinlock: Extract out the exchange of tail code word
On 06/18/2014 09:50 AM, Konrad Rzeszutek Wilk wrote: > On Wed, Jun 18, 2014 at 01:37:45PM +0200, Paolo Bonzini wrote: >> Il 17/06/2014 22:55, Konrad Rzeszutek Wilk ha scritto: >>> On Sun, Jun 15, 2014 at 02:47:01PM +0200, Peter Zijlstra wrote: >>>> From: Waiman Long<Waiman.Long at hp.com> >>>> >>>> This patch extracts the logic for the
2014 Apr 17
2
[PATCH v9 03/19] qspinlock: Add pending bit
On Thu, Apr 17, 2014 at 11:03:55AM -0400, Waiman Long wrote: > +/** > + * trylock_pending - try to acquire queue spinlock using the pending bit > + * @lock : Pointer to queue spinlock structure > + * @pval : Pointer to value of the queue spinlock 32-bit word > + * Return: 1 if lock acquired, 0 otherwise > + */ > +static inline int trylock_pending(struct qspinlock *lock, u32
2014 Apr 17
2
[PATCH v9 03/19] qspinlock: Add pending bit
On Thu, Apr 17, 2014 at 11:03:55AM -0400, Waiman Long wrote: > +/** > + * trylock_pending - try to acquire queue spinlock using the pending bit > + * @lock : Pointer to queue spinlock structure > + * @pval : Pointer to value of the queue spinlock 32-bit word > + * Return: 1 if lock acquired, 0 otherwise > + */ > +static inline int trylock_pending(struct qspinlock *lock, u32
2014 Jun 15
0
[PATCH 03/11] qspinlock: Add pending bit
Because the qspinlock needs to touch a second cacheline; add a pending bit and allow a single in-word spinner before we punt to the second cacheline. Signed-off-by: Peter Zijlstra <peterz at infradead.org> --- include/asm-generic/qspinlock_types.h | 12 ++- kernel/locking/qspinlock.c | 109 +++++++++++++++++++++++++++------- 2 files changed, 97 insertions(+), 24 deletions(-)
2014 Apr 17
0
[PATCH v9 03/19] qspinlock: Add pending bit
Because the qspinlock needs to touch a second cacheline; add a pending bit and allow a single in-word spinner before we punt to the second cacheline. Signed-off-by: Peter Zijlstra <peterz at infradead.org> Signed-off-by: Waiman Long <Waiman.Long at hp.com> --- include/asm-generic/qspinlock_types.h | 12 +++- kernel/locking/qspinlock.c | 117
2014 May 07
0
[PATCH v10 03/19] qspinlock: Add pending bit
From: Peter Zijlstra <peterz at infradead.org> Because the qspinlock needs to touch a second cacheline; add a pending bit and allow a single in-word spinner before we punt to the second cacheline. Signed-off-by: Peter Zijlstra <peterz at infradead.org> Signed-off-by: Waiman Long <Waiman.Long at hp.com> --- include/asm-generic/qspinlock_types.h | 12 +++-
2014 Jun 15
0
[PATCH 04/11] qspinlock: Extract out the exchange of tail code word
From: Waiman Long <Waiman.Long at hp.com> This patch extracts the logic for the exchange of new and previous tail code words into a new xchg_tail() function which can be optimized in a later patch. Signed-off-by: Waiman Long <Waiman.Long at hp.com> Signed-off-by: Peter Zijlstra <peterz at infradead.org> --- include/asm-generic/qspinlock_types.h | 2 +
2014 Apr 17
0
[PATCH v9 04/19] qspinlock: Extract out the exchange of tail code word
This patch extracts the logic for the exchange of new and previous tail code words into a new xchg_tail() function which can be optimized in a later patch. Signed-off-by: Waiman Long <Waiman.Long at hp.com> --- include/asm-generic/qspinlock_types.h | 2 + kernel/locking/qspinlock.c | 61 +++++++++++++++++++++------------ 2 files changed, 41 insertions(+), 22 deletions(-)
2014 Mar 03
5
[PATCH v5 3/8] qspinlock, x86: Add x86 specific optimization for 2 contending tasks
Hi, Here are some numbers for my version -- also attached is the test code. I found that booting big machines is tediously slow so I lifted the whole lot to userspace. I measure the cycles spend in arch_spin_lock() + arch_spin_unlock(). The machines used are a 4 node (2 socket) AMD Interlagos, and a 2 node (2 socket) Intel Westmere-EP. AMD (ticket) AMD (qspinlock + pending + opt) Local:
2014 Mar 03
5
[PATCH v5 3/8] qspinlock, x86: Add x86 specific optimization for 2 contending tasks
Hi, Here are some numbers for my version -- also attached is the test code. I found that booting big machines is tediously slow so I lifted the whole lot to userspace. I measure the cycles spend in arch_spin_lock() + arch_spin_unlock(). The machines used are a 4 node (2 socket) AMD Interlagos, and a 2 node (2 socket) Intel Westmere-EP. AMD (ticket) AMD (qspinlock + pending + opt) Local:
2014 Jun 17
5
[PATCH 03/11] qspinlock: Add pending bit
On Sun, Jun 15, 2014 at 02:47:00PM +0200, Peter Zijlstra wrote: > Because the qspinlock needs to touch a second cacheline; add a pending > bit and allow a single in-word spinner before we punt to the second > cacheline. Could you add this in the description please: And by second cacheline we mean the local 'node'. That is the: mcs_nodes[0] and mcs_nodes[idx] Perhaps it might be