Displaying 3 results from an estimated 3 matches for "truncstore16".
Did you mean:
truncstorei16
2012 May 31
1
[LLVMdev] Legalizing truncating store using atomic load.
...3:44, Lei Mou a écrit :
> Problem solved by returning the second result of the ATOMIC_LOAD_OR node...
You got the chain instead of the loaded value.
IMHO, a better solution would have been to add a Pat<> rule to match
truncstores and expand them into target store/load/and/or.
Pat : <(truncstore16 GPR:$val, MEM:$mem),
(store MEM:$mem,
(or
(and (load MEM:$mem), (i32 0xffff0000))
, GPR:$val
)
)>;
And you can also write a custom rule for truncstore8 if necessary. See
other target BE's for examples.
Ivan
>
> On Wed, May 30, 2...
2012 May 31
0
[LLVMdev] Legalizing truncating store using atomic load.
Problem solved by returning the second result of the ATOMIC_LOAD_OR node...
On Wed, May 30, 2012 at 9:38 PM, Lei Mou <lei.mou.uu at gmail.com> wrote:
> Hi,
>
> Our target only has native support for i32 and f32 types. For data
> types smaller than these, I have to custom lowering truncating store
> using two atomic load instruction (which have the same semantics as
>
2012 May 30
2
[LLVMdev] Legalizing truncating store using atomic load.
Hi,
Our target only has native support for i32 and f32 types. For data
types smaller than these, I have to custom lowering truncating store
using two atomic load instruction (which have the same semantics as
ISD::ATOMIC_LOAD_AND and ATOMIC_LOAD_OR, respectively). I run into a
problem during the legalization process, where the legalizer complains
that ISD::STORE and ISD::ATOMIC_LOAD_OR (generated