search for: trunc

Displaying 20 results from an estimated 782 matches for "trunc".

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2017 Sep 14
2
IVUsers pass is fragile. Is this okay? How can it be resolved?
...t datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1" target triple = "x86_64-unknown-linux-gnu" define void @test(i64 %v1, i32 %v2, i64* %addr) { entry: br label %loop loop: %iv = phi i64 [%v1, %entry], [%iv.inc, %loop] %iv2 = phi i32 [%v2, %entry], [%5, %loop] %0 = trunc i64 %iv to i32 %1 = sub i32 %iv2, %0 %2 = sitofp i32 %1 to double %3 = sub i64 0, %iv %4 = trunc i64 %3 to i32 %5 = sub i32 %1, %4 %iv.inc = add i64 %iv, 1 store i64 %iv.inc, i64* %addr, align 8 br i1 undef, label %loop, label %exit exit: ret void ; uselistorder directives ---- ; uselist...
2017 Sep 15
2
IVUsers pass is fragile. Is this okay? How can it be resolved?
...t datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1" target triple = "x86_64-unknown-linux-gnu" define void @test(i64 %v1, i32 %v2, i64* %addr) { entry: br label %loop loop: %iv = phi i64 [%v1, %entry], [%iv.inc, %loop] %iv2 = phi i32 [%v2, %entry], [%5, %loop] %0 = trunc i64 %iv to i32 %1 = sub i32 %iv2, %0 %2 = sitofp i32 %1 to double %3 = sub i64 0, %iv %4 = trunc i64 %3 to i32 %5 = sub i32 %1, %4 %iv.inc = add i64 %iv, 1 store i64 %iv.inc, i64* %addr, align 8 br i1 undef, label %loop, label %exit exit: ret void ; uselistorder directives ---- ; uselist...
2017 Jul 04
4
trunc nsw/nuw?
Hi, > Hi Alexandre, > > LLVM currently doesn't have trunc nsw/nuw, no. > Which frontend would emit such instructions? Any application in mind? > Just asking because if no frontend could emit those, then the motivation to > add nsw/nuw support to trunc would be very low I guess. I think the clang frontend could use that to allow better sta...
2017 Sep 13
2
IVUsers pass is fragile. Is this okay? How can it be resolved?
...t datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1" target triple = "x86_64-unknown-linux-gnu" define void @test(i64 %v1, i32 %v2, i64* %addr) { entry: br label %loop loop: %iv = phi i64 [%v1, %entry], [%iv.inc, %loop] %iv2 = phi i32 [%v2, %entry], [%5, %loop] %0 = trunc i64 %iv to i32 %1 = sub i32 %iv2, %0 %2 = sitofp i32 %1 to double %3 = sub i64 0, %iv %4 = trunc i64 %3 to i32 %5 = sub i32 %1, %4 %iv.inc = add i64 %iv, 1 store i64 %iv.inc, i64* %addr, align 8 br i1 undef, label %loop, label %exit exit: ret void ; uselistorder directives ---- ; uselist...
2017 Jul 03
2
trunc nsw/nuw?
Hello, >From [1], trunc does not seems to have a nsw/nuw attribute. Is it possible to have that? Or do we have that and it is not up-to-date? The definition would be: If the nuw keyword is present, the result value of the trunc is a poison value if the truncated high order bits are non-zero. If the nsw keyword is pr...
2017 Sep 16
0
IVUsers pass is fragile. Is this okay? How can it be resolved?
...%v1, i32 %v2, i64* %addr) { >>>>> entry: >>>>> br label %loop >>>>> >>>>> loop: >>>>> %iv = phi i64 [%v1, %entry], [%iv.inc, %loop] >>>>> %iv2 = phi i32 [%v2, %entry], [%5, %loop] >>>>> %0 = trunc i64 %iv to i32 >>>>> %1 = sub i32 %iv2, %0 >>>>> %2 = sitofp i32 %1 to double >>>>> %3 = sub i64 0, %iv >>>>> %4 = trunc i64 %3 to i32 >>>>> %5 = sub i32 %1, %4 >>>>> %iv.inc = add i64 %iv, 1 >>&gt...
2017 Jul 05
2
trunc nsw/nuw?
On Wed, Jul 5, 2017 at 3:59 PM, Hal Finkel via llvm-dev < llvm-dev at lists.llvm.org> wrote: > > On 07/04/2017 01:41 AM, Dr.-Ing. Christoph Cullmann via llvm-dev wrote: > >> Hi, >> >> Hi Alexandre, >>> >>> LLVM currently doesn't have trunc nsw/nuw, no. >>> Which frontend would emit such instructions? Any application in mind? >>> Just asking because if no frontend could emit those, then the motivation >>> to >>> add nsw/nuw support to trunc would be very low I guess. >>> >> I...
2012 Aug 06
4
[LLVMdev] Casting from float to unsigned char - incorrect output?
I am compiling the following code for the MIPS architecture: unsigned char trunc(float f) { return (unsigned char) f; } and it produces the following assembly (directives removed for convenience: trunc: trunc.w.s $f0, $f12 mfc1 $2, $f0 jr $ra nop However, this does not seem to produce the correct output for negative numbers. When I run the fol...
2017 Jul 05
3
trunc nsw/nuw?
...vm.org <mailto:llvm-dev at lists.llvm.org>> wrote: > > > On 07/04/2017 01:41 AM, Dr.-Ing. Christoph Cullmann via > llvm-dev wrote: > > Hi, > > Hi Alexandre, > > LLVM currently doesn't have trunc nsw/nuw, no. > Which frontend would emit such instructions? Any > application in mind? > Just asking because if no frontend could emit those, > then the motivation to > add nsw/nuw support to trun...
2017 Jan 21
2
IR canonicalization: shufflevector or vector trunc?
...17 at 9:17 AM, Rackover, Zvi <zvi.rackover at intel.com> wrote: > Hi Sanjay, > > > > I agree we should also discuss **if** this canonicalization is beneficial. > > For starters, do we have a concrete case where we would benefit from > canonicalizing shuffles <-> truncates in LLVM IR? > > IMO, we should not count benefits for codegen because that alone does not > justify transforming the IR ; we could always do this on the SelectionDAG. > > Agreed. If we're just talking about IR benefits, then it's easy to demonstrate a win for trunc/ze...
2017 Jul 07
3
trunc nsw/nuw?
Hi, Even if there are no ways in which a *frontend* can produce nsw truncs, it may still be useful to have if optimization passes can usefully attach nsw to truncates (after proving the truncates don't "overflow"). For instance in %a = ashr i64 %v, i32 33 %t = trunc %a to i32 the trunc can be marked nsw. However, the burden of proof here is to show...
2017 Jul 06
2
trunc nsw/nuw?
...implementation defined whether the program will terminate. That provides pretty big scope to optimize around :-) Note also that while unsigned variables require the implementation to act AS IF running on a binary machine, signed variables have no such requirement. Most implementations do in fact truncate by taking the remainder modulus the number of values that can be represented in the destination type, but that might not be a power of two. I would guess there is very little code in the wild that conforms to a strict interpretation of all this. On Thu, Jul 6, 2017 at 5:24 PM, Alexandre Isoard...
2017 Jan 17
2
IR canonicalization: shufflevector or vector trunc?
...-bit vector are legal, so I don't think we can currently use that to say v2i128 should be treated differently than v16i16. Is this a valid argument to not canonicalize the IR? On Mon, Jan 16, 2017 at 10:16 AM, Rackover, Zvi <zvi.rackover at intel.com> wrote: > Suppose we prefer the ‘trunc’ form, then what about cases such as: > > define <2 x i16> @shuffle(<16 x i16> %x) { > > %shuf = shufflevector <16 x i16> %x, <16 x i16> undef, <2 x i32> <i32 0, > i32 8> > > ret <2 x i16> %shuf > > } > > > > Will...
2011 Feb 15
3
[LLVMdev] How to use ConstantFoldConstantExpression?
...to \n--" << *val << "\n"; } } And this is the output i get, all constants should result in "i32 0" (at least this is what I need): **i32 bitcast (<4 x i8> zeroinitializer to i32) to --i32 bitcast (<4 x i8> zeroinitializer to i32) **i32 sext (i8 trunc (i32 bitcast (<4 x i8> zeroinitializer to i32) to i8) to i32) to --i32 sext (i8 trunc (i32 bitcast (<4 x i8> zeroinitializer to i32) to i8) to i32) **i32 bitcast (<4 x i8> <i8 trunc (i32 shl (i32 sext (i8 trunc (i32 bitcast (<4 x i8> zeroinitializer to i32) to i8) to i32...
2017 Jan 13
2
IR canonicalization: shufflevector or vector trunc?
...;4 x i16> %zext_shuffle to <2 x i32> ret <2 x i32> %bc } define <2 x i32> @zextvec(<2 x i16> %x) { %zext = zext <2 x i16> %x to <2 x i32> ret <2 x i32> %zext } IMO, the fact that we have to take endianness into account with the shuffles makes the trunc/zext forms the better choice. That way, we limit the endian dependency to one place in InstCombine, and other transforms don't have to worry about it. We also have lots of existing folds for trunc/zext and hardly any for shuffles. On Thu, Jan 12, 2017 at 1:14 PM, Rackover, Zvi <zvi...
2011 Dec 30
3
[LLVMdev] InstCombine "pessimizes" trunc i8 to i1?
Am 29.12.2011 19:52, schrieb Reid Kleckner: > I think Chris is saying that the and is necessary because with your i1 > trunc you're ignoring all of the high bits. The and implements that. > If you don't want this behavior, don't generate the trunc in the > first place and just compare the full width to zero. But if a backend sees trunc from i8 to i1 it should know about the and, therefore I think r...
2011 Feb 15
0
[LLVMdev] How to use ConstantFoldConstantExpression?
...;\n"; > } > } > > And this is the output i get, all constants should result in "i32 0" (at least this is what I need): > > **i32 bitcast (<4 x i8> zeroinitializer to i32) to > --i32 bitcast (<4 x i8> zeroinitializer to i32) > > **i32 sext (i8 trunc (i32 bitcast (<4 x i8> zeroinitializer to i32) to i8) to i32) to > --i32 sext (i8 trunc (i32 bitcast (<4 x i8> zeroinitializer to i32) to i8) to i32) > > **i32 bitcast (<4 x i8> <i8 trunc (i32 shl (i32 sext (i8 trunc (i32 bitcast (<4 x i8> zeroinitializer to i32)...
2011 Dec 29
0
[LLVMdev] InstCombine "pessimizes" trunc i8 to i1?
I think Chris is saying that the and is necessary because with your i1 trunc you're ignoring all of the high bits. The and implements that. If you don't want this behavior, don't generate the trunc in the first place and just compare the full width to zero. Reid On Wed, Dec 28, 2011 at 6:45 AM, Jochen Wilhelmy <j.wilhelmy at arcor.de>wrote: > >...
2011 Dec 28
3
[LLVMdev] InstCombine "pessimizes" trunc i8 to i1?
>> Hi! >> >> before InstCombine (llvm::createInstructionCombiningPass()) I have >> a trunc from i8 to i1 and then a select: >> >> %45 = load i8* @myGlobal, align 1 >> %tobool = trunc i8 %45 to i1 >> %cond = select i1 %tobool, float 1.000000e+00, float -1.000000e+00 >> >> after instCombine I have: >> >> %29 = load i8* @myGlobal, align 1 >...
2011 Aug 11
5
[LLVMdev] nsw/nuw for trunc
Hi everyone, we'd like to be able to check for loss of information in trunc operations in our LLVM-based bounded model checker [1]. For this it is important if the trunc was on a signed or unsigned integer, so we need nsw and nuw flags for this. Would you accept a patch that adds these flags to LLVM (and possibly clang)? Regards, Florian [1] http://baldur.it...