search for: true1

...t> %15, %cr %17 = extractelement <4 x i1> %16, i32 0 %18 = extractelement <4 x i1> %16, i32 1 %19 = extractelement <4 x i1> %16, i32 2 %20 = extractelement <4 x i1> %16, i32 3 %21 = or i1 %17, %18 %22 = or i1 %19, %20 %23 = or i1 %21, %22 br i1 %23, label %true1, label %false2

...12312). Michael > Liao submitted fixes for this, so I think > if you change it to > %16 = fcmp ogt <4 x float> %15, %cr > %17 = sext <4 x i1> %16 to <4 x i32> > %18 = bitcast <4 x i32> %17 to i128 > %19 = icmp ne i128 %18, 0 > br i1 %19, label %true1, label %false2 > > should do the trick (one cmpps + one ptest + one br instruction). > This, however, requires sse41 which I don't know if you have - you say > the extractelements go through memory which I've never seen then again > our code didn't try to extract the i1...

...lar to something I filed a bug on (12312). Michael Liao submitted fixes for this, so I think if you change it to %16 = fcmp ogt <4 x float> %15, %cr %17 = sext <4 x i1> %16 to <4 x i32> %18 = bitcast <4 x i32> %17 to i128 %19 = icmp ne i128 %18, 0 br i1 %19, label %true1, label %false2 should do the trick (one cmpps + one ptest + one br instruction). This, however, requires sse41 which I don't know if you have - you say the extractelements go through memory which I've never seen then again our code didn't try to extract the i1 directly (even without fi...

> > which goes through memory. Is there some idiom I'm missing so that it would use > > for instance movmsk for SSE or vcmpgt & cr6 for altivec? > > I don't think you are missing anything: LLVM IR has no support for horizontal > operations like or'ing the elements of a vector of boolean together. The code > generators do try to recognize a few idioms and

...o submitted fixes for this, so I think >> if you change it to >> %16 = fcmp ogt <4 x float> %15, %cr >> %17 = sext <4 x i1> %16 to <4 x i32> >> %18 = bitcast <4 x i32> %17 to i128 >> %19 = icmp ne i128 %18, 0 >> br i1 %19, label %true1, label %false2 >> >> should do the trick (one cmpps + one ptest + one br instruction). >> This, however, requires sse41 which I don't know if you have - you say >> the extractelements go through memory which I've never seen then again >> our code didn't try...

...4 x i1> %16, i32 0 > %18 = extractelement <4 x i1> %16, i32 1 > %19 = extractelement <4 x i1> %16, i32 2 > %20 = extractelement <4 x i1> %16, i32 3 > %21 = or i1 %17, %18 > %22 = or i1 %19, %20 > %23 = or i1 %21, %22 > br i1 %23, label %true1, label %false2 > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >

...%3, align 4 store i32 %0, i32* %4, align 4 store i8** %1, i8*** %5, align 8 store i32 2, i32* %6, align 4 store i32 3, i32* %7, align 4 %8 = load i32, i32* %6, align 4 %9 = load i32, i32* %7, align 4 %10 = icmp slt i32 %8, %9 sbr i1 %10, label %true, label %false true: %true1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0)) br label %end false: %false1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i32 0, i32 0)) br label %end end: %end1 = load i32, i32* %3, align...