Displaying 1 result from an estimated 1 matches for "trivialspil".
2010 May 05
1
[LLVMdev] Register allocation questions
Hello,
I am currently working another register allocator for LLVM, and I have a
few questions.
I have a list of LiveIntervals that interfere with each other, and once
I figure out that I need to spill one of these, I'm using
LiveIntervals::addIntervalsForSpills to generate spill code. I'm not
sure I'm using this function correctly (or if it's even the right thing
to use).