Displaying 2 results from an estimated 2 matches for "trcdwr".
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rcdwr
2013 Jul 18
1
[PATCH 02/11] drm/nv50/pm: Fix last timing register in NVA3+, fix typo in NV50
...nk_3_2 == 0) {
+ tUnk_3_2 = 0x16;
+ }
+
t->reg[0] = (e->tRP << 24 | e->tRAS << 16 | e->tRFC << 8 | e->tRC);
t->reg[1] = (e->tWR + 2 + (t->tCWL - 1)) << 24 |
@@ -102,7 +108,9 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq,
e->tRCDWR << 8 |
e->tRCDRD);
- t->reg[4] = e->tUNK_13 << 8 | e->tUNK_13;
+ t->reg[3] = (tUnk_3_2 << 16) | (e->tCL - 1);
+
+ t->reg[4] = (unk20 << 24 | unk21 << 16) | e->tUNK_13 << 8 | e->tUNK_13;
t->reg[5] = (e->tRFC <<...
2013 Jul 18
0
[PATCH 02/11] drm/nv50/pm: Fix last timing register in NVA3+, fix typo in NV50
...+ }
> +
> t->reg[0] = (e->tRP << 24 | e->tRAS << 16 | e->tRFC << 8 | e->tRC);
>
> t->reg[1] = (e->tWR + 2 + (t->tCWL - 1)) << 24 |
> @@ -102,7 +108,9 @@ nv50_mem_timing_calc(struct drm_device *dev, u32 freq,
> e->tRCDWR << 8 |
> e->tRCDRD);
>
> - t->reg[4] = e->tUNK_13 << 8 | e->tUNK_13;
> + t->reg[3] = (tUnk_3_2 << 16) | (e->tCL - 1);
> +
> + t->reg[4] = (unk20 << 24 | unk21 << 16) | e->tUNK_13 << 8 | e->tUNK_13;
>...