Displaying 2 results from an estimated 2 matches for "trap_cond_alway".
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trap_cond_always
2016 Apr 15
3
[Sparc] Load address with SETHI
Hi,
I'm trying to implement __builtin_setjmp / __builtin_longjmp for Sparc processors. I think I'm very close, but I can't work out how to issue BuildMI-type instructions to load the address of the recovery location (set in setjmp) into a register using the SETHI / OR combination. I can't see any equivalent code anywhere else in Sparc.
I imagine this is similar if I try to make a
2016 Apr 27
2
[Sparc] builtin setjmp / longjmp - need help to get past last problem
...MIB = BuildMI(*MBB, MI, DL, TII->get(SP::LDri))
+ .addReg(JmpLoc, RegState::Define)
+ .addReg(Buf)
+ .addImm(PtrSize);
+ MIB.setMemRefs(MMOBegin, MMOEnd);
+
+ // TO DO: If we do 64-bit handling, this perhaps should be FLUSHW, not TA 3
+ const long int TRAP_COND_ALWAYS = 0x08;
+ MIB = BuildMI(*MBB, MI, DL, TII->get(SP::TRAPri), SP::G0).addImm(3).addImm(TRAP_COND_ALWAYS);
+
+ // Instruction to restore FP
+ const unsigned FP = SP::I6;
+ MIB = BuildMI(*MBB, MI, DL, TII->get(SP::LDri))
+ .addReg(FP)
+ .addReg(Buf)
+...