search for: transport_triggered_architecture

Displaying 10 results from an estimated 10 matches for "transport_triggered_architecture".

2007 Nov 05
6
[LLVMdev] allocating registers less "sparingly"
...are not usually the bottleneck as our target programs are at the moment mainly DSP kernels and multimedia codecs which are usually loop-oriented. In addition, LLVM seems to do an excellent job in inlining function calls. I look forward to your replies. The links: [1] http://en.wikipedia.org/wiki/Transport_triggered_architecture [2] http://tce.cs.tut.fi/papers/TCE_Overview.pdf Best regards, -- Pekka Jääskeläinen, Researcher at Tampere Univ. of Technology, Finland.
2006 Nov 02
4
[LLVMdev] LLVM and libc
We are going to use LLVM in a compiler project for transport triggered processors. See Wikipedia for more on transport triggering: <http://en.wikipedia.org/wiki/Transport_Triggered_Architectures>. One thing we need is some sort of libc. We are targeting embedded systems, and I have been looking at things like newlib. Are there people out there doing something similar? Or any advice or opinions as to how go about the whole thing? -- Pertti
2007 Nov 06
0
[LLVMdev] allocating registers less "sparingly"
...ms are at the moment > mainly DSP > kernels and multimedia codecs which are usually loop-oriented. In > addition, > LLVM seems to do an excellent job in inlining function calls. > > I look forward to your replies. > > The links: > > [1] http://en.wikipedia.org/wiki/Transport_triggered_architecture > [2] http://tce.cs.tut.fi/papers/TCE_Overview.pdf > > Best regards, > -- > Pekka Jääskeläinen, > Researcher at Tampere Univ. of Technology, Finland. > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu...
2006 Nov 09
2
[LLVMdev] LLVM and newlib progress
This is in response to Reid's and John's comments about intrinsics. The setting of the work is a project on reconfigurable processors using the Transport Triggered Architecture (TTA) <http://en.wikipedia.org/wiki/Transport_triggered_architecture>. For the compiler this means that the target architecture is not fixed, but rather an instance of a processor template. Different instances of the template can vary in the mix of function units and their connectivity. In addition to the source files, the compiler takes a processor description a...
2009 Mar 27
0
[LLVMdev] Announcing the Open Source Release of TTA-Based Codesign Environment (TCE) 1.0
...ionary-based instruction compression Integrated Development Environment tools: * Graphical user interface (GUI) for editing architecture resources * GUI for editing operation set definitions Links: ------ * TCE: http://tce.cs.tut.fi * TTA wikipedia article: http://en.wikipedia.org/wiki/Transport_triggered_architecture * The LLVM Compiler Infrastructure: http://llvm.org Best regards, -- Pekka Jääskeläinen, Researcher Department of Computer Systems Tampere University of Technology Finland
2009 Mar 27
1
[LLVMdev] Announcing the Open Source Release of TTA-Based Codesign Environment (TCE) 1.0
...ionary-based instruction compression Integrated Development Environment tools: * Graphical user interface (GUI) for editing architecture resources * GUI for editing operation set definitions Links: ------ * TCE: http://tce.cs.tut.fi * TTA wikipedia article: http://en.wikipedia.org/wiki/Transport_triggered_architecture * The LLVM Compiler Infrastructure: http://llvm.org Best regards, -- Pekka Jääskeläinen, Researcher Department of Computer Systems Tampere University of Technology Finland
2007 Nov 05
0
[LLVMdev] allocating registers less "sparingly"
...ms are at the moment > mainly DSP > kernels and multimedia codecs which are usually loop-oriented. In > addition, > LLVM seems to do an excellent job in inlining function calls. > > I look forward to your replies. > > The links: > > [1] http://en.wikipedia.org/wiki/Transport_triggered_architecture > [2] http://tce.cs.tut.fi/papers/TCE_Overview.pdf > > Best regards, > -- > Pekka Jääskeläinen, > Researcher at Tampere Univ. of Technology, Finland. > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu...
2006 Nov 09
0
[LLVMdev] LLVM and newlib progress
Pertti Kellomäki wrote: > This is in response to Reid's and John's comments about > intrinsics. > > The setting of the work is a project on reconfigurable > processors using the Transport Triggered Architecture (TTA) > <http://en.wikipedia.org/wiki/Transport_triggered_architecture>. > For the compiler this means that the target architecture > is not fixed, but rather an instance of a processor template. > Different instances of the template can vary in the mix of > function units and their connectivity. In addition to the > source files, the compiler takes...
2006 Nov 09
0
[LLVMdev] LLVM and newlib progress
Hi Pertti, On Thu, 2006-11-09 at 15:29 +0200, Pertti Kellomäki wrote: > I managed to compile newlib with llvm-gcc yesterday. That > is, the machine independent part is now basically done, and > the syscall part contains no-op stubs provided by libgloss. > I haven't tested the port yet, but since newlib has already > been ported to many architectures, I would be pretty surprised
2006 Nov 09
9
[LLVMdev] LLVM and newlib progress
I managed to compile newlib with llvm-gcc yesterday. That is, the machine independent part is now basically done, and the syscall part contains no-op stubs provided by libgloss. I haven't tested the port yet, but since newlib has already been ported to many architectures, I would be pretty surprised if there were any major problems. A couple of things I noticed when configuring newlib for