search for: transfersuccessorsandupdatephis

Displaying 7 results from an estimated 7 matches for "transfersuccessorsandupdatephis".

2013 Feb 18
1
[LLVMdev] splitting a branch within a pseudo
...M_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); // Transfer the remainder of BB and its successor edges to sinkMBB. sinkMBB->splice(sinkMBB->begin(), BB, llvm::next(MachineBasicBlock::iterator(MI)), BB->end()); sinkMBB->transferSuccessorsAndUpdatePHIs(BB); // Next, add the true and fallthrough blocks as its successors. BB->addSuccessor(copy0MBB); BB->addSuccessor(sinkMBB); // Emit the right instruction according to the type of the operands compared if (isFPCmp) BuildMI(BB, dl, TII->get(Opc)).addMBB(sinkMBB); el...
2013 Feb 18
0
[LLVMdev] splitting a branch within a pseudo
...M_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); // Transfer the remainder of BB and its successor edges to sinkMBB. sinkMBB->splice(sinkMBB->begin(), BB, llvm::next(MachineBasicBlock::iterator(MI)), BB->end()); sinkMBB->transferSuccessorsAndUpdatePHIs(BB); // Next, add the true and fallthrough blocks as its successors. BB->addSuccessor(copy0MBB); BB->a On 02/17/2013 12:51 PM, Reed Kotler wrote: > After discussions last night, I'm leaning towards going legit with all > my pseudo expansions in Mips 16. > > Some I th...
2013 Feb 17
4
[LLVMdev] splitting a branch within a pseudo
After discussions last night, I'm leaning towards going legit with all my pseudo expansions in Mips 16. Some I think I can clearly do by just putting in the proper side effects of implicit registers (T8 the condition code register as used by mips 16). But I'm still left with some pseudos that have jmp .+4 type instructions in them. The original Mips port was to Mips I and Mips I,
2014 Dec 08
2
[LLVMdev] Virtual register problem in X86 backend
...k(LLVM_BB); // Insert the new basicblocks F->insert(MBB, MBB_cond); F->insert(MBB, MBB_erase); F->insert(MBB, MBB_end); // Split the last MBB in two MBB_end->splice(MBB_end->begin(), MBB, next(MachineBasicBlock::iterator(MI)), MBB->end()); MBB_end->transferSuccessorsAndUpdatePHIs(MBB); // Move MBB at the right place MBB_end->moveAfter(MBB); MBB_erase->moveAfter(MBB); MBB_cond->moveAfter(MBB); // Set the new successors MBB->addSuccessor(MBB_cond); MBB_cond->addSuccessor(MBB_erase); MBB_cond->addSuccessor(MBB_end); MBB_e...
2014 Oct 28
2
[LLVMdev] Problem in X86 backend (again)
...= F->CreateMachineBasicBlock(LLVM_BB); // Insert the new basicblocks F->insert(MBB, MBB_cond); F->insert(MBB, MBB_erase); F->insert(MBB, MBB_end); // Split the last MBB in two MBB_end->splice(MBB_end->begin(), MBB, next(MachineBasicBlock::iterator(MI)), MBB->end()); MBB_end->transferSuccessorsAndUpdatePHIs(MBB); // Move MBB at the right place MBB_end->moveAfter(MBB); MBB_erase->moveAfter(MBB); MBB_cond->moveAfter(MBB); // Set the new successors MBB->addSuccessor(MBB_cond); MBB_erase->addSuccessor(MBB_cond); MBB_cond->addSuccessor(MBB_end); MBB_cond->addSuccessor(MBB_erase); Machi...
2014 Dec 10
2
[LLVMdev] Virtual register problem in X86 backend
...insert(MBB, MBB_cond); >> F->insert(MBB, MBB_erase); >> F->insert(MBB, MBB_end); >> >> // Split the last MBB in two >> MBB_end->splice(MBB_end->begin(), MBB, >> next(MachineBasicBlock::iterator(MI)), MBB->end()); >> MBB_end->transferSuccessorsAndUpdatePHIs(MBB); >> >> // Move MBB at the right place >> MBB_end->moveAfter(MBB); >> MBB_erase->moveAfter(MBB); >> MBB_cond->moveAfter(MBB); >> >> // Set the new successors >> MBB->addSuccessor(MBB_cond); >> MBB_cond->ad...
2016 Apr 27
2
[Sparc] builtin setjmp / longjmp - need help to get past last problem
...MF->insert(It, mainMBB); + MF->insert(It, sinkMBB); + + // Transfer the remainder of BB and its successor edges to sinkMBB. + sinkMBB->splice(sinkMBB->begin(), MBB, + std::next(MachineBasicBlock::iterator(MI)), + MBB->end()); + sinkMBB->transferSuccessorsAndUpdatePHIs(MBB); + + MachineInstrBuilder MIB; + + unsigned LabelReg = MRI.createVirtualRegister(&SP::IntRegsRegClass); + unsigned BufReg = MI->getOperand(1).getReg(); + + MIB = BuildMI(*thisMBB, MI, DL, TII->get(SP::SETHIi)) + .addReg(LabelReg, RegState::Define) + .ad...