search for: trace_irqs_on

...do_call: call *ia32_sys_call_table(,%rax,8) movq %rax,RAX-ARGOFFSET(%rsp) GET_THREAD_INFO(%r10) - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10) jnz int_ret_from_sys_call @@ -141,7 +148,7 @@ sysenter_do_call: CFI_REGISTER rip,rdx TRACE_IRQS_ON swapgs - sti /* sti only takes effect after the next instruction */ + ENABLE_INTERRUPTS(CLBR_NONE) /* sti only takes effect after the next instruction */ /* sysexit */ .byte 0xf, 0x35 @@ -199,7 +206,7 @@ ENTRY(ia32_cstar_target) * No need to follow this irqs on/off section: the syscall...

...do_call: call *ia32_sys_call_table(,%rax,8) movq %rax,RAX-ARGOFFSET(%rsp) GET_THREAD_INFO(%r10) - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10) jnz int_ret_from_sys_call @@ -141,7 +148,7 @@ sysenter_do_call: CFI_REGISTER rip,rdx TRACE_IRQS_ON swapgs - sti /* sti only takes effect after the next instruction */ + ENABLE_INTERRUPTS(CLBR_NONE) /* sti only takes effect after the next instruction */ /* sysexit */ .byte 0xf, 0x35 @@ -199,7 +206,7 @@ ENTRY(ia32_cstar_target) * No need to follow this irqs on/off section: the syscall...

...readinfo_flags(%rcx),%edx andl %edi,%edx @@ -261,7 +269,7 @@ sysret_check: /*CFI_REGISTER rflags,r11*/ movq %gs:pda_oldrsp,%rsp swapgs - sysretq + SYSRETQ CFI_RESTORE_STATE /* Handle reschedules */ @@ -270,7 +278,7 @@ sysret_careful: bt $TIF_NEED_RESCHED,%edx jnc sysret_signal TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) pushq %rdi CFI_ADJUST_CFA_OFFSET 8 call schedule @@ -281,7 +289,7 @@ sysret_careful: /* Handle a signal */ sysret_signal: TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) testl $(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME|_TIF_SINGLESTEP),%edx jz 1f...

...readinfo_flags(%rcx),%edx andl %edi,%edx @@ -261,7 +269,7 @@ sysret_check: /*CFI_REGISTER rflags,r11*/ movq %gs:pda_oldrsp,%rsp swapgs - sysretq + SYSRETQ CFI_RESTORE_STATE /* Handle reschedules */ @@ -270,7 +278,7 @@ sysret_careful: bt $TIF_NEED_RESCHED,%edx jnc sysret_signal TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) pushq %rdi CFI_ADJUST_CFA_OFFSET 8 call schedule @@ -281,7 +289,7 @@ sysret_careful: /* Handle a signal */ sysret_signal: TRACE_IRQS_ON - sti + ENABLE_INTERRUPTS(CLBR_NONE) testl $(_TIF_SIGPENDING|_TIF_NOTIFY_RESUME|_TIF_SINGLESTEP),%edx jz 1f...

...uot; .align 4 .long 1b,syscall_fault -.previous +.popsection = pushl %eax CFI_ADJUST_CFA_OFFSET 4 @@ -378,18 +378,18 @@ restore_nocheck_notrace: addl $4, %esp CFI_ADJUST_CFA_OFFSET -4 1: INTERRUPT_RETURN -.section .fixup,"ax" +.pushsection .fixup,"ax" iret_exc: TRACE_IRQS_ON ENABLE_INTERRUPTS pushl $0 # no error code pushl $do_iret_error jmp error_code -.previous -.section __ex_table,"a" +.popsection +.pushsection __ex_table,"a" .align 4 .long 1b,iret_exc -.previous +.popsection = CFI_RESTORE_STATE ldt_ss: @@ -415,11 +415,11 @@ ld...

...uot; .align 4 .long 1b,syscall_fault -.previous +.popsection = pushl %eax CFI_ADJUST_CFA_OFFSET 4 @@ -378,18 +378,18 @@ restore_nocheck_notrace: addl $4, %esp CFI_ADJUST_CFA_OFFSET -4 1: INTERRUPT_RETURN -.section .fixup,"ax" +.pushsection .fixup,"ax" iret_exc: TRACE_IRQS_ON ENABLE_INTERRUPTS pushl $0 # no error code pushl $do_iret_error jmp error_code -.previous -.section __ex_table,"a" +.popsection +.pushsection __ex_table,"a" .align 4 .long 1b,iret_exc -.previous +.popsection = CFI_RESTORE_STATE ldt_ss: @@ -415,11 +415,11 @@ ld...

Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. The main change from the last posting is that all the page-table related patches have been moved out, and will be posted separately. Also, the off-by-one in reserving the top of address space has been

Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. The main change from the last posting is that all the page-table related patches have been moved out, and will be posted separately. Also, the off-by-one in reserving the top of address space has been

...\ .long 2b,5b; \ - .long 3b,6b; \ .popsection #define RING0_INT_FRAME \ @@ -406,19 +403,14 @@ restore_nocheck_notrace: RESTORE_REGS addl $4, %esp # skip orig_eax/error_code CFI_ADJUST_CFA_OFFSET -4 -1: INTERRUPT_RETURN -.section .fixup,"ax" + INTERRUPT_RETURN + iret_exc: TRACE_IRQS_ON ENABLE_INTERRUPTS(CLBR_NONE) pushl $0 # no error code pushl $do_iret_error jmp error_code -.previous -.section __ex_table,"a" - .align 4 - .long 1b,iret_exc -.previous CFI_RESTORE_STATE ldt_ss: @@ -863,21 +855,22 @@ nmi_espfix_stack: RESTORE_REGS lss 12+4(%esp), %esp #...

...\ .long 2b,5b; \ - .long 3b,6b; \ .popsection #define RING0_INT_FRAME \ @@ -406,19 +403,14 @@ restore_nocheck_notrace: RESTORE_REGS addl $4, %esp # skip orig_eax/error_code CFI_ADJUST_CFA_OFFSET -4 -1: INTERRUPT_RETURN -.section .fixup,"ax" + INTERRUPT_RETURN + iret_exc: TRACE_IRQS_ON ENABLE_INTERRUPTS(CLBR_NONE) pushl $0 # no error code pushl $do_iret_error jmp error_code -.previous -.section __ex_table,"a" - .align 4 - .long 1b,iret_exc -.previous CFI_RESTORE_STATE ldt_ss: @@ -863,21 +855,22 @@ nmi_espfix_stack: RESTORE_REGS lss 12+4(%esp), %esp #...

...path */ - ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ - "jmp .Lsyscall_32_done", X86_FEATURE_XENPV + #define JMP_IF_IRET testl %eax, %eax; jz .Lsyscall_32_done + ALTERNATIVE(JMP_IF_IRET, jmp .Lsyscall_32_done, X86_FEATURE_XENPV) /* Opportunistic SYSEXIT */ TRACE_IRQS_ON /* User mode traces as IRQs on. */ @@ -536,7 +536,7 @@ restore_all: TRACE_IRQS_IRET .Lrestore_all_notrace: #ifdef CONFIG_X86_ESPFIX32 - ALTERNATIVE "jmp .Lrestore_nocheck", "", X86_BUG_ESPFIX + ALTERNATIVE(jmp .Lrestore_nocheck, , X86_BUG_ESPFIX) movl PT_EFLAGS(%esp),...

Hi folks, Here is the result of the latest work on the pvops front, after the x86 arch merge. From the functionality point of view, almost nothing was changed, except for proper vsmp support - which was discussed, but not implemented before - and the introduction of smp_ops in x86_64, which eased the merging of the smp header. Speaking of the merge, a significant part (although not majority) of

Hi folks, Here is the result of the latest work on the pvops front, after the x86 arch merge. From the functionality point of view, almost nothing was changed, except for proper vsmp support - which was discussed, but not implemented before - and the introduction of smp_ops in x86_64, which eased the merging of the smp header. Speaking of the merge, a significant part (although not majority) of

[ REPOST: Apologies to anyone who has seen this before. It didn't make it onto any of the lists it should have. -J ] Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. For the most part, these patches do nothing or very little. The patches should

[ REPOST: Apologies to anyone who has seen this before. It didn't make it onto any of the lists it should have. -J ] Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. For the most part, these patches do nothing or very little. The patches should

The first patch fixes Xen PV regression introduced by 32-bit rewrite. Unlike the earlier version it uses ALTERNATIVE instruction and avoids using xen_sysexit (and sysret32 in compat mode) pv ops, as suggested by Andy. As result of this patch irq_enable_sysexit and usergs_sysret32 pv ops are not used anymore by anyone and so can be removed. v2: * patch both TEST and JZ intructions with a

The first patch fixes Xen PV regression introduced by 32-bit rewrite. Unlike the earlier version it uses ALTERNATIVE instruction and avoids using xen_sysexit (and sysret32 in compat mode) pv ops, as suggested by Andy. As result of this patch irq_enable_sysexit and usergs_sysret32 pv ops are not used anymore by anyone and so can be removed. v2: * patch both TEST and JZ intructions with a

Here is an slightly updated version of the paravirt_ops patch. If your comments and criticism were welcome before, now it's even more! There are some issues that are _not_ addressed in this revision, and here are the causes: * split debugreg into multiple functions, suggested by Andi: - Me and jsfg agree that introducing more pvops (specially 14!) is not worthwhile. So, although we do

Here is an slightly updated version of the paravirt_ops patch. If your comments and criticism were welcome before, now it's even more! There are some issues that are _not_ addressed in this revision, and here are the causes: * split debugreg into multiple functions, suggested by Andi: - Me and jsfg agree that introducing more pvops (specially 14!) is not worthwhile. So, although we do

This is hopefully the last iteration of the pvops64 patch. >From the last version, we have only one change, which is include/asm-x86_64/processor.h: There were still one survivor in raw asm. Also, git screwed me up for some reason, and the 25th patch was missing the new files, paravirt.{c,h}. (although I do remember having git-add'ed it, but who knows...) Andrew, could you please push it