search for: tp69310p69318

...ter.inc/" file. But I am still thinking that there should be a way to not pass the registers as an implicit operands. So other approaches will be appreciated. Thanks, Arsen -- View this message in context: http://llvm.1065342.n5.nabble.com/Regarding-Instruction-definition-in-LLVM-backend-tp69310p69318.html Sent from the LLVM - Dev mailing list archive at Nabble.com.

Hi all, My question is related to the register usage in instruction definition at TARGETInstrInfo.td file. I have defined new Target with it Registers and instructions. Now I need to generate an instruction like: mov MYREG1_NAME, MYREG2_NAME for the built-in function taking one constant integer argument, such as "__builtin_my_function_name(88)" I wondering whether it is possible