Displaying 1 result from an estimated 1 matches for "tp56489p56492".
2013 Apr 05
3
[LLVMdev] Generate addi 40, r3 instruction
I want to generate the instruction like
addi 40, r3 ! i.e. r3 = r3 + 40
The format i wrote is
def ADDI : F1<opcode, (outs IntRegs:$dst), (ins IntRegs:$dst, i32imm:$imm)
"addi $imm, $dst",
[(set $IntRegs:$dst, (add $IntRegs:$dst, i32imm:$c))]
but it is not compiling.
what should be the format.
vikram
--
View this message