Displaying 20 results from an estimated 20 matches for "tmp24".
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tmp2
2014 May 22
2
[LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer
...bb3: ; preds = %bb2, %bb1
%phi = phi %struct1* [ %tmp10, %bb1 ], [ %tmp20, %bb2 ]
%tmp24 = getelementptr inbounds %struct1* %phi, i64 0, i32 1
%tmp25 = load i32* %tmp24, align 4
ret i32 %tmp25
}...
2011 Apr 05
2
[LLVMdev] Incompatible types at call site
..., Apr 5, 2011 at 1:44 PM, Duncan Sands <baldrick at free.fr> wrote:
> Hi Arushi,
>
>
> %tmp63 = call %struct.TypHeader* (...)* bitcast (%struct.TypHeader*
>> (%struct.TypHeader*, i64, i64)* @Cyclotomic to %struct.TypHeader*
>> (...)*)(%struct.TypHeader* %tmp62, i64 %tmp24, i32 1) nounwind, !dbg !907
>> ;
>> <%struct.TypHeader*> [#uses=1]
>>
>> the 3rd parameter is now used in an srem statement. How do we know what
>> value is
>> used? Does this use decide whether the value is sign extended or zero
>> extended?
>>...
2014 May 23
2
[LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer
...lementptr inbounds %struct2* %dm, i64 %tmp9, i32 0
> br label %bb3
>
> bb2: ; preds = %.lr.ph.i.i
> %tmp20 = getelementptr inbounds %struct2* %dm, i64 %tmp9, i32 1
> br label %bb3
>
> bb3: ; preds = %bb2, %bb1
> %phi = phi %struct1* [ %tmp10, %bb1 ], [ %tmp20, %bb2 ]
> %tmp24 = getelementptr inbounds %struct1* %phi, i64 0, i32 1
>
> %tmp25 = load i32* %tmp24, align 4
> ret i32 %tmp25
> }
>
>
> %array1 = type [2 x i32]
> %array2 = type [2 x %array1]
>
> ; Function Attrs: ssp uwtable
> define i32 @test2(%array2* %dm, i1 %tmp4, i64 %tmp...
2014 May 22
4
[LLVMdev] RFC: Indexing of structs vs arrays in getelementpointer
...bb3:
%phi = phi %struct2* [ %tmp10, %bb1 ], [ %tmp20, %bb2 ]
%tmp24 = getelementptr inbounds %struct2* %phi, i64 0, i32 1
%tmp25 = load i32* %tmp24, align 4
is rewritten as:
%struct2 = type { i32, i32 }...
2007 Jun 12
3
[LLVMdev] ARM backend problem ?
...* %i
%tmp16 = load i32* %n
%tmp18 = load i32* %inc
%tmp15 = add i32 %tmp16, %tmp18
%tmp13 = icmp slt i32 %tmp14, %tmp15
br i1 %tmp13, label %then11, label %else12
then11:
%tmp20 = load i32* %f
%tmp22 = alloca i32
store i32 1 , i32* %tmp22
%tmp23 = load i32* %tmp22
%tmp24 = load i32* %i
%tmp21 = add i32 %tmp24, %tmp23
store i32 %tmp21, i32* %i
%tmp19 = mul i32 %tmp20, %tmp21
store i32 %tmp19, i32* %f
br label %then4
else12:
%tmp25 = load i32* %f
%tmp335 = getelementptr [4 x i8]* @.str1, i32 0, i32 0
%tmp33...
2011 Apr 06
0
[LLVMdev] Incompatible types at call site
Unoptimized IR
%tmp63 = call %struct.TypHeader* (...)* bitcast (%struct.TypHeader*
(%struct.TypHeader*, i64, i64)* @Cyclotomic to %struct.TypHeader*
(...)*)(%struct.TypHeader* %tmp62, i64 %tmp24, i32 1) nounwind, !dbg !907 ;
<%struct.TypHeader*> [#uses=1]
Optimized IR
%tmp63 = call%struct.TypHeader*
(%struct.TypHeader*, i64, i64)* @Cyclotomic (%struct.TypHeader* %tmp62, i64
%tmp24, i64 1) nounwind
<%struct.TypHeader*> [#uses=1]
The way InstCombine manages this, is (from In...
2011 Apr 05
2
[LLVMdev] Incompatible types at call site
%tmp63 = call %struct.TypHeader* (...)* bitcast (%struct.TypHeader*
(%struct.TypHeader*, i64, i64)* @Cyclotomic to %struct.TypHeader*
(...)*)(%struct.TypHeader* %tmp62, i64 %tmp24, i32 1) nounwind, !dbg !907 ;
<%struct.TypHeader*> [#uses=1]
the 3rd parameter is now used in an srem statement. How do we know what
value is used? Does this use decide whether the value is sign extended or
zero extended?
Arushi
On Tue, Apr 5, 2011 at 1:35 AM, Duncan Sands <baldrick at...
2007 Jun 12
0
[LLVMdev] ARM backend problem ?
...mp16, %tmp18
>
> %tmp13 = icmp slt i32 %tmp14, %tmp15
>
> br i1 %tmp13, label %then11, label %else12
>
>
>
> then11:
>
> %tmp20 = load i32* %f
>
> %tmp22 = alloca i32
>
> store i32 1 , i32* %tmp22
>
> %tmp23 = load i32* %tmp22
>
> %tmp24 = load i32* %i
>
> %tmp21 = add i32 %tmp24, %tmp23
>
> store i32 %tmp21, i32* %i
>
> %tmp19 = mul i32 %tmp20, %tmp21
>
> store i32 %tmp19, i32* %f
>
> br label %then4
>
>
>
> else12:
>
> %tmp25 = load i32* %f
>
> %tmp335 = geteleme...
2007 Jul 31
3
[LLVMdev] Adding custom operation intrinsic for ASIP architectures.
...mization
pass for raising certain type of function calls to those intrinsics
(similar to raising mallocs).
Basically our custom operation are like calls, with operand name and
multiple inputs and outputs. e.g. C code:
__llvm__custom_op_add(a,b,c) would be raised to customop add(i32 %tmp1,
i32 %tmp24 , i32 %tmp25). Those "__llvm__custom_op_" prefixed function
will not have function body, but pure declarations in C code level.
Comments are welcome, especially if there anyone else, that needs this
kind of functionality or if people has already implemented something
similar.
Mikael...
2011 Apr 05
0
[LLVMdev] Incompatible types at call site
Hi Arushi,
> %tmp63 = call %struct.TypHeader* (...)* bitcast (%struct.TypHeader*
> (%struct.TypHeader*, i64, i64)* @Cyclotomic to %struct.TypHeader*
> (...)*)(%struct.TypHeader* %tmp62, i64 %tmp24, i32 1) nounwind, !dbg !907 ;
> <%struct.TypHeader*> [#uses=1]
>
> the 3rd parameter is now used in an srem statement. How do we know what value is
> used? Does this use decide whether the value is sign extended or zero extended?
inside the called function the 3rd value will cont...
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
2007 Jan 29
2
[LLVMdev] A question about GetElementPtr common subexpression elimination/loop invariant code motion
...int %test() {
entry:
%mat = alloca [7 x [7 x [7 x int]]], align 16 ; <[7 x
[7 x [7 x int]]]*> [#uses=2]
br label %cond_true
cond_true: ; preds = %bb31, %bb22, %cond_true, %entry
%j.1.2.ph = phi int [ 0, %entry ], [ %j.1.2.ph, %cond_true ], [
%tmp24, %bb22 ], [ 0, %bb31 ] ; <int> [#uses=4]
%i.0.0.ph = phi int [ 0, %entry ], [ %i.0.0.ph, %cond_true ], [
%i.0.0.ph, %bb22 ], [ %tmp33, %bb31 ] ; <int> [#uses=5]
%k.2.4 = phi int [ 0, %entry ], [ %tmp19, %cond_true ], [ 0,
%bb22 ], [ 0, %bb31 ]...
2008 Jan 12
1
[LLVMdev] Labels
...mp8, %tmp9
%tmp11 = icmp slt i32 %tmp10, 512
br i1 %tmp11, label %bb, label %bb13
bb13:
%tmp15 = load %struct._IO_FILE** @stdin, align 4
%tmp16 = tail call i32 @_IO_getc( %struct._IO_FILE* %tmp15 )
%tmp21 = icmp eq i32 %tmp16, -1
br i1 %tmp21, label %cond_next, label %cond_true
cond_true:
%tmp24 = load i8** @yybuf, align 4
%tmp25 = load i32* @yypos, align 4
%tmp2627 = trunc i32 %tmp16 to i8
%tmp28 = getelementptr i8* %tmp24, i32 %tmp25
store i8 %tmp2627, i8* %tmp28, align 1
br label %cond_next
cond_next:
%iftmp.29.0 = phi i32 [ 1, %cond_true ], [ 0, %bb13 ]
%tmp31 = icmp eq i32 %if...
2007 Aug 01
0
[LLVMdev] Adding custom operation intrinsic for ASIP architectures.
...certain type of function calls to those intrinsics
> (similar to raising mallocs).
>
> Basically our custom operation are like calls, with operand name and
> multiple inputs and outputs. e.g. C code:
> __llvm__custom_op_add(a,b,c) would be raised to customop add(i32 %tmp1,
> i32 %tmp24 , i32 %tmp25). Those "__llvm__custom_op_" prefixed function
> will not have function body, but pure declarations in C code level.
>
> Comments are welcome, especially if there anyone else, that needs this
> kind of functionality or if people has already implemented something
&...
2008 Jun 11
4
[LLVMdev] Query on optimization and tail call.
...;i32> [#uses=1]
%tmp. = zext i32 %tmp to i64 ; <i64> [#uses=2]
%tmp19 = add i64 %tmp., -1 ; <i64> [#uses=1]
%tmp20 = mul i64 %tmp19, %tmp. ; <i64> [#uses=1]
%tmp21 = lshr i64 %tmp20, 1 ; <i64> [#uses=1]
%tmp.22 = trunc i64 %tmp21 to i32 ; <i32> [#uses=1]
%tmp24 = sub i32 %tmp18, %tmp.22 ; <i32> [#uses=1]
ret i32 %tmp24
bb10: ; preds = %entry
ret i32 0
}
which is great! It computes the sum as n*(n+1)/2. However, when I try just this:
int sum(int n)
{
return n + sum(n-1);
}
it generates this:
define i32 @sum(i32 %n) nounwind {
entry:
%t...
2007 Aug 01
1
[LLVMdev] Adding custom operation intrinsic for ASIP architectures.
...ctions through inline assembly) to LLVM parlance.
Let's study this more closely.
>
> Basically our custom operation are like calls, with operand name and
> multiple inputs and outputs. e.g. C code:
> __llvm__custom_op_add(a,b,c) would be raised to customop add(i32 %tmp1,
> i32 %tmp24 , i32 %tmp25). Those "__llvm__custom_op_" prefixed function
> will not have function body, but pure declarations in C code level.
What is the mechanism to first insert the __llvm__custom_op IR operations? Are
these automatically decided by the code selector? Then, your code selector
s...
2011 Apr 05
0
[LLVMdev] Incompatible types at call site
Hi Arushi,
> For a call like this,
>
> %tmp6 = call i32 (...)* bitcast (i32 (i8*, i8, i8**)* @ssplit to i32 (...)*)(i8*
> %tmp599, i32 46, i8** %domainv3) nounwind ; <i32>
>
> does the 2nd argument get zero extended or sign extended?
neither since it does not have the zext or sext attribute.
Ciao, Duncan.
2011 Apr 05
3
[LLVMdev] Incompatible types at call site
Hi,
For a call like this,
%tmp6 = call i32 (...)* bitcast (i32 (i8*, i8, i8**)* @ssplit to i32
(...)*)(i8* %tmp599, i32 46, i8** %domainv3) nounwind ; <i32>
does the 2nd argument get zero extended or sign extended?
Thanks,
Arushi
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2007 Aug 01
2
[LLVMdev] Adding custom operation intrinsic for ASIP architectures.
...n calls to those intrinsics
>> (similar to raising mallocs).
>>
>> Basically our custom operation are like calls, with operand name and
>> multiple inputs and outputs. e.g. C code:
>> __llvm__custom_op_add(a,b,c) would be raised to customop add(i32 %tmp1,
>> i32 %tmp24 , i32 %tmp25). Those "__llvm__custom_op_" prefixed function
>> will not have function body, but pure declarations in C code level.
>>
>> Comments are welcome, especially if there anyone else, that needs this
>> kind of functionality or if people has already impleme...
2008 Jun 10
3
[LLVMdev] DejaGNU test fixes
...i64 %mask17, 68719476735 ; <i64> [#uses=1]
%tmp20 = add i64 %mask19, 1 ; <i64> [#uses=1]
%mask21 = and i64 %tmp20, 68719476735 ; <i64> [#uses=2]
%mask22 = and i64 %mask21, 68719476735 ; <i64> [#uses=0]
%mask23 = and i64 %mask21, 68719476735 ; <i64> [#uses=1]
%tmp24 = mul i64 %mask23, 8 ; <i64> [#uses=1]
%mask25 = and i64 %tmp24, 68719476735 ; <i64> [#uses=1]
%mask26 = and i64 %mask25, 68719476735 ; <i64> [#uses=0]
%tmp27 = load i32* %n.0, align 4 ; <i32> [#uses=1]
%tmp28 = add i32 %tmp27, 1 ; <i32> [#uses=0]
%tmp29 = lo...
2013 Oct 15
0
[LLVMdev] [llvm-commits] r192750 - Enable MI Sched for x86.
...BEL: t3:
>> -; DARWIN: shll $16
>> ; DARWIN: shlq $32, %rcx
>> +; DARWIN-NEXT: orq %rcx, %rax
>> +; DARWIN-NEXT: shll $8
>> ; DARWIN-NOT: leaq
>> -; DARWIN: orq %rcx, %rax
>> %tmp21 = zext i32 %lb to i64
>> %tmp23 = zext i32 %ub to i64
>> %tmp24 = shl i64 %tmp23, 32
>>
>> Modified: llvm/trunk/test/CodeGen/X86/fast-isel-mem.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-mem.ll?rev=192750&r1=192749&r2=192750&view=diff
>> ===============================================...