search for: tmp0

Hi everyone, For reasons beyond the scope of this message, I'd like to append a NULL element to the end of a list. tmp0 <- list(a=1, b=NULL, c=3) append(tmp0, c(d=4)) ## works as expected append(tmp0, c(d=NULL)) ## list with a/b/c only Given that I could use tmp0$a <- NULL to remove 'a', I seem to understand why appending NULL returns me the original list... But how should I proceed to actually have...

...a, 5 ret i8 %c } with `build/Debug/bin/llc -march=avr llvm.ll -o -` and I receive: .file "test.ll" .text .global foo .type foo, at function foo: # @foo # BB#0: # %entry MOV r22, r24 LDI r24, -5 ADD r24, r18 RET .tmp0: .size foo, .tmp0-foo While I would like the output as such: .file "test.ll" .text .global foo .type foo, at function foo: # @foo # BB#0: # %entry SUB r24, 5 RET .tmp0: .size foo, .tmp0-foo With that my question...

...0_ir_lowering_gm107.cpp index 113f372..64989ac 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp @@ -159,7 +159,10 @@ GM107LoweringPass::handlePFETCH(Instruction *i) bld.mkOp2(OP_SHR , TYPE_U32, tmp1, tmp0, bld.mkImm(16)); bld.mkOp2(OP_AND , TYPE_U32, tmp0, tmp0, bld.mkImm(0xff)); bld.mkOp2(OP_AND , TYPE_U32, tmp1, tmp1, bld.mkImm(0xff)); - bld.mkOp1(OP_MOV , TYPE_U32, tmp2, bld.mkImm(i->getSrc(0)->reg.data.u32)); + if (i->getSrc(1)) + bld.mkOp2(OP_ADD , TYPE_U32, tmp2, i-&g...

I'm cross-compiling for MIPS. The test-case is as simple as it can be: void foo() {} $clang -target mips64-octeon-linux -c -B path/to/cross/compiled/mips/assembler a.c And then I look at the object file: $ nm a.o 0000000000000020 t $tmp0 0000000000000000 T foo I would like to know what "$tmp0" is. Furthermore, if I pass -g to clang, I see a whole bunch of such symbols. Some of them appear to be MIPS specific DWARF extensions. But the ones I'm not able to figure out are the $tmp* symbols: # nm a.o 0000000000000000 N...

Hi Bill, there are a couple of things I didn't understand about your proposal, for example how it interacts with inlining, whether it is feasible to do the "turn invoke-of-Unwind_Resume into a branch" optimization and also whether in "resumedest" you still plan to use _Unwind_Resume to continue unwinding up the stack. Could you please show what the LLVM IR would look like

It seems that Tablegen is generating intrinsic ID's off by in DAGISel.inc In DAGISel.inc, I have the following pattern: int64_t CN1 = Tmp0->getZExtValue(); // Pattern: (intrinsic_w_chain:f32 103:iPTR, GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Emits: (MACRO_FMA_f32:f32 GPRF32:f32:$src0, GPRF32:f32:$src1, GPRF32:f32:$src2) // Pattern complexity = 8 cost = 1 size = 0 if (CN1 == INT64_C(103)) {...

hi, list, I found AMDGPUPromoteAlloca calculates newly ptr as follows: std::tie(TCntY, TCntZ) = getLocalSizeYZ(Builder); Value *TIdX = getWorkitemID(Builder, 0); Value *TIdY = getWorkitemID(Builder, 1); Value *TIdZ = getWorkitemID(Builder, 2); Value *Tmp0 = Builder.CreateMul(TCntY, TCntZ, "", true, true); Tmp0 = Builder.CreateMul(Tmp0, TIdX); Value *Tmp1 = Builder.CreateMul(TIdY, TCntZ, "", true, true); Value *TID = Builder.CreateAdd(Tmp0, Tmp1); TID = Builder.CreateAdd(TID, TIdZ); it assumes that we enable 3 dims a...

...8*), i8* null), label %bb23, label %bb25 Here three LLVM instructions are used in one instruction, namely br, icmp and bitcast. Is there a way to tell clang++ to break the operand of br into 3 separate instructions or a pass that exists that does it. Ideally, I would like to see the following I8* tmp0 = i8* bitcast (i32 (i32)* @pthread_cancel to i8* I1 tmp = icmp ne i8* tmp0, i8* null br i1 tmp, label %bb23, label %bb25 Thanks Sreekumar -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110819/537b1cff/att...

Are you using isTarget = 1 in your intrinsics file? On Apr 14, 2009, at 6:34 PM, Villmow, Micah wrote: > It seems that Tablegen is generating intrinsic ID’s off by in > DAGISel.inc > > In DAGISel.inc, I have the following pattern: > int64_t CN1 = Tmp0->getZExtValue(); > > // Pattern: (intrinsic_w_chain:f32 103:iPTR, GPRF32:f32:$src0, > GPRF32:f32:$src1, GPRF32:f32:$src2) > // Emits: (MACRO_FMA_f32:f32 GPRF32:f32:$src0, GPRF32:f32:$src1, > GPRF32:f32:$src2) > // Pattern complexity = 8 cost = 1 size = 0 >...

...h looks like this: > > define i32 @test_tree(i32 %x) { > > %byte0 = and i32 %x, 255 ; 0x000000ff > > %byte1 = and i32 %x, 65280 ; 0x0000ff00 > > %byte2 = and i32 %x, 16711680 ; 0x00ff0000 > > %byte3 = and i32 %x, 4278190080 ; 0xff000000 > > %tmp0 = shl i32 %byte0, 8 > > %tmp1 = lshr i32 %byte1, 8 > > %tmp2 = shl i32 %byte2, 8 > > %tmp3 = lshr i32 %byte3, 8 > > %or0 = or i32 %tmp0, %tmp1 > > %or1 = or i32 %tmp2, %tmp3 > > %result = or i32 %or0, %or1 > > ret i32 %result > > } >...

Dan Gohman wrote: > There certainly are wishlist items for TableGen and TableGen-based > instruction descriptions, though I don't know of an official list. > Offhand, > a few things that come to mind are the ability to handle nodes with > multiple results, Is there an official workaround, BTW? - Volodya

...ot;, align 1 > @.str1 = private unnamed_addr constant [18 x i8] c"caught double %g\0A\00", align 1 > > define i32 @_Z3foov() uwtable optsize ssp { > entry: > invoke void @_Z3barv() optsize > to label %try.cont unwind label %lpad > > invoke.cont7: > %tmp0 = tail call i8* @__cxa_begin_catch(i8* %exn) nounwind > %tmp1 = bitcast i8* %tmp0 to i32* > %exn.scalar = load i32* %tmp1, align 4 > %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([19 x i8]* @.str, i64 0, i64 0), > i32...

...# %entry ld HL, 8 add HL,SP <--- problem line ld DE, 1 ld BC, 2 ld (SP+6), BC ld B, H ld C, L or BC, DE ld (SP+4), BC ld (HL),64 ld D, H ld E, L ld BC, (SP+6) or DE, BC ld BC, (SP+4) ld H, B ld L, C ld (HL),-128 ld H, D ld L, E ld (HL),-64 $tmp0: .size simple, ($tmp0)-simple The problem is that llc replaces ADD instruction with OR. Without defining OR16 function, the .S is not generated and claims that it cannot select OR instruction. So I added OR16 (that's the or BC,DE piece of code). But problem is that I am using the first tw...

...19 x i8] c"caught integer %d\0A\00", align 1 @.str1 = private unnamed_addr constant [18 x i8] c"caught double %g\0A\00", align 1 define i32 @_Z3foov() uwtable optsize ssp { entry: invoke void @_Z3barv() optsize to label %try.cont unwind label %lpad invoke.cont7: %tmp0 = tail call i8* @__cxa_begin_catch(i8* %exn) nounwind %tmp1 = bitcast i8* %tmp0 to i32* %exn.scalar = load i32* %tmp1, align 4 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([19 x i8]* @.str, i64 0, i64 0), i32 %exn.scalar) op...

...line > ld DE, 1 > ld BC, 2 > ld (SP+6), BC > ld B, H > ld C, L > or BC, DE > ld (SP+4), BC > ld (HL),64 > ld D, H > ld E, L > ld BC, (SP+6) > or DE, BC > ld BC, (SP+4) > ld H, B > ld L, C > ld (HL),-128 > ld H, D > ld L, E > ld (HL),-64 > $tmp0: > .size simple, ($tmp0)-simple > > > The problem is that llc replaces ADD instruction with OR. > > Without defining OR16 function, the .S is not generated and claims that it > cannot select OR instruction. > So I added OR16 (that's the or BC,DE piece of code). > >...

...t;Hello KernelConst" = internal constant [14 x sbyte ] c"Hello Kernel\0A\00" "myKernelMap" = type {int (sbyte*)*, int ()*} "Kernel" = type {"myKernelMap"*} declare int %printf(sbyte*, ...) declare int %getchar(...) int %puts_kernel(sbyte* %string) { %tmp0 = call int (sbyte*, ...)* %printf(sbyte* %string) ret int 0 } int %getchar_kernel() { %tmp0 = call int (...)* %getchar() ret int 0 } "Kernel"* "createKernel"() { "myKernelMapInstance" = malloc "myKernelMap" "myKernel" = malloc "Kernel" &...

...fore every read or write in a position of an array, our pass will add instructions to check if the index of the array is outside the bounds. The secured program, without optimizations, is shown below: #include <stdlib.h> #include <stdio.h> int main(int argc, char** argv){ int i, tmp0; int* A; A = (int*)calloc(10,sizeof(int)); for(i=0;i<=11;i++){ if (i<0 or i>10) raise("Array out of bounds."); A[i] = i; } tmp0 = 11; if (tmp0<0 or tmp0>10) raise("Array out of bounds.");...

...>> ld C, L >> or BC, DE >> ld (SP+4), BC >> ld (HL),64 >> ld D, H >> ld E, L >> ld BC, (SP+6) >> or DE, BC >> ld BC, (SP+4) >> ld H, B >> ld L, C >> ld (HL),-128 >> ld H, D >> ld L, E >> ld (HL),-64 >> $tmp0: >> .size simple, ($tmp0)-simple >> >> >> The problem is that llc replaces ADD instruction with OR. >> >> Without defining OR16 function, the .S is not generated and claims that >> it cannot select OR instruction. >> So I added OR16 (that's the or...

...of an array, our pass will > add instructions to check if the index of the array is outside the > bounds. > The secured program, without optimizations, is shown below: > > #include <stdlib.h> > #include <stdio.h> > int main(int argc, char** argv){ > int i, tmp0; > int* A; > A = (int*)calloc(10,sizeof(int)); > for(i=0;i<=11;i++){ > if (i<0 or i>10) raise("Array out of bounds."); > A[i] = i; > } > tmp0 = 11; > if (tmp0<0 or tmp0>10) raise...

This is a revision of the second exception handling proposal I sent out. You can see it here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-November/036484.html After much discussion, there are some changes to the proposal – some significant and some minor. One major point, this proposal does not address the issue of catching an exception thrown from a non-invoke instruction. However if done