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...t machine) even > > though I explicitly select another target for cross-compilation by doing > > --march=sparc or --march=alpha. > > I did the once-per-module solution to this exact problem. Here's what it > looks like: > > class RA { > const TargetMachine* tm_; > const TargetRegisterInfo* tri_; > const TargetInstrInfo * tii_; > [...] > bool RA::runOnMachineFunction(MachineFunction &fn) { > mf_ = &fn; > tm_ = &fn.getTarget(); > tri_ = tm_->getRegisterInfo(); > tii_ = tm_->getInstrInfo(); > >...

Hi, I'm playing with some experimental register allocators for LLVM. One of them needs to build a so-called register class tree for representing the aliasing information among register classes. This tree is not function or module specific. It is actually target specific, because it depends only on the register classes defined for a machine that is used as a target of the current compilation.

...class VirtRegMap; - - class SimpleRegisterCoalescing : public MachineFunctionPass { + class RegisterAllocator; + + class SimpleRegisterCoalescing : public MachineFunctionPass, + public RegisterCoalescer { MachineFunction* mf_; const TargetMachine* tm_; const MRegisterInfo* mri_; @@ -45,10 +50,35 @@ /// with other intervals. BitVector JoinedLIs; + /// didWork - Tell whether we have run on this function already. + /// This allows the coalescer to either run independently or from + /// within a register allocator. + typ...

On Jul 11, 2007, at 11:39 AM, David Greene wrote: > On Wednesday 11 July 2007 12:41, Tanya M. Lattner wrote: > >> I think the coalescer should be flexible enough to be run >> independent of >> the register allocator. For example, you may want to expose the >> copies >> induced by transforming out of SSA to the scheduler. If the >> scheduler is

...BCompare { > + bool operator()(const IdxMBBPair &LHS, const IdxMBBPair &RHS) > const { > + return LHS.first < RHS.first; > + } > + }; > + > class LiveIntervals : public MachineFunctionPass { > MachineFunction* mf_; > const TargetMachine* tm_; > @@ -153,6 +167,23 @@ > return MBB2IdxMap[MBBNo].second; > } > > + /// getMBBFromIndex - given an index in any instruction of an > + /// MBB return a pointer the MBB > + MachineBasicBlock* getMBBFromIndex(unsigned index) const { > + std::vector<I...

Hi Evan, Here is a patch for the LiveIntervalAnalysis that we discussed. --- Evan Cheng <evan.cheng at apple.com> schrieb: > > 1) What is the easiest way to understand which MBB a given > instruction index belongs to? All the required information is > available in the > > MBB2IdxMap of the LiveIntervalAnalysis class. Would it be useful > to add a small function

...xMBBPair &LHS, const IdxMBBPair &RHS) > > > const { > > + return LHS.first < RHS.first; > > + } > > + }; > > + > > class LiveIntervals : public MachineFunctionPass { > > MachineFunction* mf_; > > const TargetMachine* tm_; > > @@ -153,6 +167,23 @@ > > return MBB2IdxMap[MBBNo].second; > > } > > > > + /// getMBBFromIndex - given an index in any instruction of an > > + /// MBB return a pointer the MBB > > + MachineBasicBlock* getMBBFromIndex(unsigned index) c...

...t IdxMBBPair &RHS) >> >>> const { >>> + return LHS.first < RHS.first; >>> + } >>> + }; >>> + >>> class LiveIntervals : public MachineFunctionPass { >>> MachineFunction* mf_; >>> const TargetMachine* tm_; >>> @@ -153,6 +167,23 @@ >>> return MBB2IdxMap[MBBNo].second; >>> } >>> >>> + /// getMBBFromIndex - given an index in any instruction of an >>> + /// MBB return a pointer the MBB >>> + MachineBasicBlock* getMBBFromInde...