Displaying 3 results from an estimated 3 matches for "timing_10_d".
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timing_10_ds
2017 Apr 10
0
[PATCH 03/11] nvkm/gddr5: MR calculation for timing table v1.0
...unsigned ramcfg_11_04:8;
- unsigned ramcfg_11_06:8;
unsigned ramcfg_11_07_02:1;
unsigned ramcfg_11_07_04:1;
unsigned ramcfg_11_07_08:1;
@@ -132,6 +132,7 @@ struct nvbios_ramcfg {
unsigned timing_10_RRD:8;
unsigned timing_10_XPDLL:8;
unsigned timing_10_ODT:3;
+ unsigned timing_10_DS:2;
/* empty: 15 */
unsigned timing_10_10:8;
/* empty: 17 */
@@ -139,7 +140,8 @@ struct nvbios_ramcfg {
unsigned timing_10_CWL:8;
unsigned timing_10_FAW:8;
unsigned timing_10_CKE:8;
- /* empty: 22, 23 */
+ unsigned timing_10_ADRCMD_T:8; /* XXX: [3:2]? */
+ /* empty: 2...
2017 Apr 10
11
Preparations for Fermi DRAM clock changes
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern upload routines from GK104+ now shared with GT215+
- Timing calculation for Fermi
- GDDR5 MR calculation from VBIOS timing table v1.0. Also useful for that
pesky GT 240.
- A routine to translate a VBIOS init
2017 Apr 10
14
RESEND Preparations for Fermi DRAM clock changes
Two patches went missing as a result of PEBCAK. No v2 marks as nothing
changed really. Just resending for easier enforcement of patch order
in other people's trees. Sorry for the noise.
Original message:
No, no, these will not implement Fermi reclocking. This set of patches
contains some of the preparatory work that I deem stable enough to
move upstream. Notable changes
- Training pattern