search for: tile_mod

Displaying 20 results from an estimated 116 matches for "tile_mod".

Did you mean: tile_mode
2019 Dec 11
2
[PATCH 3/3] drm/nouveau: Support NVIDIA format modifiers
...{ > asyw->image.layout = 0; > if (drm->client.device.info.chipset >= 0xc0) > - asyw->image.blockh = fb->nvbo->mode >> 4; > + asyw->image.blockh = fb->tile_mode >> 4; > else > - asyw->image.blockh = fb->nvbo->mode; > + asyw->image.blockh = fb->tile_mode; > asyw->image.blocks[0] = fb->base.pitches[0] / 64; >...
2019 Dec 11
0
[PATCH 3/3] drm/nouveau: Support NVIDIA format modifiers
...-255,9 +255,9 @@ nv50_wndw_atomic_check_acquire(struct nv50_wndw *wndw, bool modeset, if (asyw->image.kind) { asyw->image.layout = 0; if (drm->client.device.info.chipset >= 0xc0) - asyw->image.blockh = fb->nvbo->mode >> 4; + asyw->image.blockh = fb->tile_mode >> 4; else - asyw->image.blockh = fb->nvbo->mode; + asyw->image.blockh = fb->tile_mode; asyw->image.blocks[0] = fb->base.pitches[0] / 64; asyw->image.pitch[0] = 0; } else { diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/n...
2020 Feb 10
3
[PATCH v5 0/3] drm/nouveau: Support NVIDIA format modifiers
...s of compares with chipset number in the series were audited, deemed safe, and left as-is for consistency with existing code. v3: -Rebased on nouveau linux-5.6 @ 137c4ba7163ad9d5696b9fde78b1c0898a9c115b -Noted corresponding Mesa patches are production-worthy now -Better validate bo tile_mode when checking framebuffer size. v4: Do not cache kind, tile_mode in nouveau_framebuffer v5: Resolved against nouveau_framebuffer cleanup James Jones (3): drm/nouveau: Add format mod prop to base/ovly/nvdisp drm/nouveau: Check framebuffer size against bo drm/nouveau: Support NVIDIA format...
2020 Feb 07
3
[PATCH v4 0/3] drm/nouveau: Support NVIDIA format modifiers
...s of compares with chipset number in the series were audited, deemed safe, and left as-is for consistency with existing code. v3: -Rebased on nouveau linux-5.6 @ 137c4ba7163ad9d5696b9fde78b1c0898a9c115b -Noted corresponding Mesa patches are production-worthy now -Better validate bo tile_mode when checking framebuffer size. v4: Do not cache kind, tile_mode in nouveau_framebuffer James Jones (3): drm/nouveau: Add format mod prop to base/ovly/nvdisp drm/nouveau: Check framebuffer size against bo drm/nouveau: Support NVIDIA format modifiers drivers/gpu/drm/nouveau/dispnv50/base5...
2019 Dec 13
0
[PATCH 3/3] drm/nouveau: Support NVIDIA format modifiers
...asyw->image.layout = 0; >> if (drm->client.device.info.chipset >= 0xc0) >> - asyw->image.blockh = fb->nvbo->mode >> 4; >> + asyw->image.blockh = fb->tile_mode >> 4; >> else >> - asyw->image.blockh = fb->nvbo->mode; >> + asyw->image.blockh = fb->tile_mode; >> asyw->image.blocks[0] = fb->base.pitc...
2020 Jan 06
1
[PATCH v2 2/3] drm/nouveau: Check framebuffer size against bo
...return (height + (1 << log_block_height) - 1) >> log_block_height; > +} > + > +static int > +nouveau_check_bl_size(struct nouveau_drm *drm, struct nouveau_bo *nvbo, > + uint32_t offset, uint32_t stride, uint32_t h, > + uint32_t tile_mode) > +{ > + uint32_t gob_size, bw, bh; > + uint64_t bl_size; > + > + BUG_ON(drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA); > + > + if (drm->client.device.info.chipset >= 0xc0) > + tile_mode >>= 4; > + >...
2014 Sep 26
0
[RFC PATCH 6/7] drm/nouveau: Support marking buffers for explicit sync
...-git a/drm/nouveau_bo.c b/drm/nouveau_bo.c index 534734a..68b7bdd 100644 --- a/drm/nouveau_bo.c +++ b/drm/nouveau_bo.c @@ -180,7 +180,7 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags, int nouveau_bo_new(struct drm_device *dev, int size, int align, - uint32_t flags, uint32_t tile_mode, uint32_t tile_flags, + uint32_t flags, uint32_t tile_mode, uint32_t bo_flags, struct sg_table *sg, struct nouveau_bo **pnvbo) { @@ -211,7 +211,7 @@ nouveau_bo_new(struct drm_device *dev, int size, int align, INIT_LIST_HEAD(&nvbo->entry); INIT_LIST_HEAD(&nv...
2019 Dec 11
5
[PATCH 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available here: https://gitlab.freedesktop.org/cubanismo/mesa/tree/nouveau_work But those need a bit of cleanup before they're ready to submit. I've tested this on Tesla, Kepler, Pascal,
2013 Nov 12
0
[PATCH 6/7] drm/nouveau: more paranoia in nouveau_bo_fixup_align
...b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -160,24 +160,20 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags, struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev); struct nouveau_device *device = nv_device(drm->device); - if (device->card_type < NV_50) { - if (nvbo->tile_mode) { - if (device->chipset >= 0x40) { - *align = 65536; - *size = roundup(*size, 64 * nvbo->tile_mode); - - } else if (device->chipset >= 0x30) { - *align = 32768; - *size = roundup(*size, 64 * nvbo->tile_mode); - - } else if (device->chipset >= 0x20) { -...
2014 Jul 01
1
[Bug 80738] New: Possible wrong variable used in nouveau_allocate_surface
...a at gmail.com Hardware: Other Status: NEW Version: unspecified Component: Driver/nouveau Product: xorg Hi, I was analyzing xf86 video nouveau code and found a possible bug on nouveau_allocate_surface (nv_accel_common.c src file) When setting tile_mode for NV_FERMI/NVC0 or higher families, it uses tile_mode to calculate height. However, instead of using "cfg.nvc0.tile_mode" it is using "cfg.nv50.tile_mode". See bellow: if (pNv->Architecture >= NV_FERMI) { if (height > 64...
2019 Sep 10
1
[Intel-gfx] [PATCH v6 08/17] drm/ttm: use gem vma_node
...index e918b437af17..7d5ede756711 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -186,8 +186,8 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags, } struct nouveau_bo * -nouveau_bo_alloc(struct nouveau_cli *cli, u64 size, u32 flags, u32 tile_mode, - u32 tile_flags) +nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 flags, + u32 tile_mode, u32 tile_flags) { struct nouveau_drm *drm = cli->drm; struct nouveau_bo *nvbo; @@ -195,8 +195,8 @@ nouveau_bo_alloc(struct nouveau_cli *cli, u64 size, u32 flags, u32 tile_mo...
2020 Feb 05
3
[PATCH v3 0/3] drm/nouveau: Support NVIDIA format modifiers
...s of compares with chipset number in the series were audited, deemed safe, and left as-is for consistency with existing code. v3: -Rebased on nouveau linux-5.6 @ 137c4ba7163ad9d5696b9fde78b1c0898a9c115b -Noted corresponding Mesa patches are production-worthy now -Better validate bo tile_mode when checking framebuffer size. James Jones (3): drm/nouveau: Add format mod prop to base/ovly/nvdisp drm/nouveau: Check framebuffer size against bo drm/nouveau: Support NVIDIA format modifiers drivers/gpu/drm/nouveau/dispnv50/base507c.c | 7 +- drivers/gpu/drm/nouveau/dispnv50/disp.c...
2019 Dec 17
6
[PATCH v2 0/3] drm/nouveau: Support NVIDIA format modifiers
This series modifies the NV5x+ nouveau display backends to advertise appropriate format modifiers on their display planes in atomic mode setting blobs. Corresponding modifications to Mesa/userspace are available here: https://gitlab.freedesktop.org/cubanismo/mesa/tree/nouveau_work But those need a bit of cleanup before they're ready to submit. I've tested this on Tesla, Kepler, Pascal,
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...d tic2 = 0xd0001000; > + if (pitch == 0) > + tic2 |= 0x00004000; > + else > + tic2 |= 0x0005c000; > + PUSH_DATA(push, format); > + PUSH_DATA(push, bo->offset + offset); > + PUSH_DATA(push, ((bo->offset + offset) >> 32) | > + (bo->config.nvc0.tile_mode << 18) | > + tic2); > + PUSH_DATA(push, 0x00300000); > + PUSH_DATA(push, 0x80000000 | width); > + PUSH_DATA(push, 0x00010000 | height); > + PUSH_DATA(push, 0x03000000); > + PUSH_DATA(push, 0x00000000); > + } else { > + unsigned tile_mode = bo->confi...
2020 Jul 18
2
[PATCH v2] drm/nouveau: Accept 'legacy' format modifiers
...vers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 496c4621cc78..31543086254b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c @@ -191,8 +191,14 @@ nouveau_decode_mod(struct nouveau_drm *drm, uint32_t *tile_mode, uint8_t *kind) { + struct nouveau_display *disp = nouveau_display(drm->dev); BUG_ON(!tile_mode || !kind); + if ((modifier & (0xffull << 12)) == 0ull) { + /* Legacy modifier. Translate to this device's 'kind.' */ + modifier |= disp->format_modifiers[0] &am...
2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...d tic2 = 0xd0001000; > + if (pitch == 0) > + tic2 |= 0x00004000; > + else > + tic2 |= 0x0005c000; > + PUSH_DATA(push, format); > + PUSH_DATA(push, bo->offset + offset); > + PUSH_DATA(push, ((bo->offset + offset) >> 32) | > + (bo->config.nvc0.tile_mode << 18) | > + tic2); > + PUSH_DATA(push, 0x00300000); > + PUSH_DATA(push, 0x80000000 | width); > + PUSH_DATA(push, 0x00010000 | height); > + PUSH_DATA (push, 0x03000000); > + PUSH_DATA (push, 0x00000000); Cosmetic. > + } else { > + unsigned tile_mode...
2020 Jul 30
2
[PATCH v3] drm/nouveau: Accept 'legacy' format modifiers
...vers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 496c4621cc78..31543086254b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c @@ -191,8 +191,14 @@ nouveau_decode_mod(struct nouveau_drm *drm, uint32_t *tile_mode, uint8_t *kind) { + struct nouveau_display *disp = nouveau_display(drm->dev); BUG_ON(!tile_mode || !kind); + if ((modifier & (0xffull << 12)) == 0ull) { + /* Legacy modifier. Translate to this device's 'kind.' */ + modifier |= disp->format_modifiers[0] &am...
2015 Jun 15
4
[PATCH v2 0/2] drm/nouveau: option for staging ioctls and new GEM_SET_TILING ioctl
Second version of this patchset addressing Ben's comments and fixing a few extra things. This patchset proposes to introduce a "staging" module option to dynamically enable features (mostly ioctls) that are merged but may be refined before they are declared "stable". The second patch illustrates the use of this staging option with the SET_TILING ioctl, which can be used to
2020 Jul 18
1
[PATCH] drm/nouveau: Accept 'legacy' format modifiers
...rs/gpu/drm/nouveau/nouveau_display.c >> index 496c4621cc78..31543086254b 100644 >> --- a/drivers/gpu/drm/nouveau/nouveau_display.c >> +++ b/drivers/gpu/drm/nouveau/nouveau_display.c >> @@ -191,8 +191,14 @@ nouveau_decode_mod(struct nouveau_drm *drm, >> uint32_t *tile_mode, >> uint8_t *kind) >> { >> + struct nouveau_display *disp = nouveau_display(drm->dev); >> BUG_ON(!tile_mode || !kind); >> >> + if ((modifier & (0xffull << 12)) == 0ull) { >> + /* Legacy modifier. Translate to this device's...
2019 Dec 17
0
[PATCH v2 2/3] drm/nouveau: Check framebuffer size against bo
...k_height = log_block_height_in_gobs + log_gob_height; + + return (height + (1 << log_block_height) - 1) >> log_block_height; +} + +static int +nouveau_check_bl_size(struct nouveau_drm *drm, struct nouveau_bo *nvbo, + uint32_t offset, uint32_t stride, uint32_t h, + uint32_t tile_mode) +{ + uint32_t gob_size, bw, bh; + uint64_t bl_size; + + BUG_ON(drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA); + + if (drm->client.device.info.chipset >= 0xc0) + tile_mode >>= 4; + + BUG_ON(tile_mode & 0xFFFFFFF0); + + if (drm->client.device.info.family < N...