search for: tiipredicate

> On May 11, 2018, at 4:26 AM, Andrea Di Biagio <andrea.dibiagio at gmail.com> wrote: > > The goal is to help users defining a predicate the check logic. If we use a TIIPredicate, we specify the logic only once, in a declarative way, and then we let tablegen generate code for us. > > If for some reason, a user doesn't want to use this approach, then they can still provide their own implementation for variant 2. (i.e. the version of `isGPRZero` that takes a MCInst...

..."the new predicate framework is extensible". That means, developers can extend it by adding new Check predicates. As long as they also teach the PredicateExpander how to do the lowering for those new predicates, then everything should be fine. -- In the RFC I mentioned how we can use a TIIPredicate to let tablegen auto-generate two version of function `isGPRZero`: 1) a version that takes a MachineInstr as input, and that is automatically generated by tablegen into the target-specific instruction info class. 2) another version (still auto-generated by tablegen) that takes a MCInst as input....

On 10 May 2018 at 21:58, Andrew Trick <atrick at apple.com> wrote: > Fantastic writeup! It’s great to see so much progress on fundamental > infrastructure. > > My time for LLVM code review is extremely limited. Can someone work with > Andrea to get these patches in? Hi Andrew, Same here, but this has been a long goal for me, too, so I'll do my best. -- cheers,

...CheckCOPY : CheckAllOf<[ CheckPseudo<[COPY]>, CheckRegOperand<1>, CheckRegOperandValue<1, WZR> ]>; // Return true if this instruction simply sets its single destination register // to zero. This is equivalent to a register rename of the zero-register. def IsGPRZero : TIIPredicate<"AArch64", "isGPRZero", AnyOfMCPredicates<[CheckMOVZ, CheckANDW, CheckANDX, CheckCOPY]>>; ``` TIIPredicate definitions are used to model calls to the target-specific InstrInfo. A TIIPredicate definition is treated specially by the InstrInfoEmitter tablegen backen...