Displaying 7 results from an estimated 7 matches for "thumb2instrinfo".
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thumb1instrinfo
2013 Jun 25
2
[LLVMdev] Adding a new ARM RegisterClass
...o various
RegisterClass definitions (like GPR pairs just for R0-R7, another for rGPR
that doesn't contain the SP, .).
If I add a new RegisterClass however, the dynamically created GPRPair class
corresponding to this new RegisterClass overlaps with the dynamically
created class for rGPR. In Thumb2InstrInfo.cpp, the dynamically created
TargetRegisterClass GPRPair_with_gsub_1_in_rGPRRegClass is explicitly called
out. If I add my new class, the class GPRPair_with_gsub_1_in_rGPRRegClass is
never created, instead the class GPRPair_with_gsub_1_in_newGPRRegClass is
created. Compilation therefore fails. I co...
2012 Sep 26
5
[LLVMdev] mips16 puzzle
...but does work except in this case of load/store haflword and byte to stack objects.
>>
>
> ARM has a similar problem. The InstrInfo classes should be factored out so that the targets have separate implementations where appropriate. See ARMBaseInstrInfo, ARMInstrInfo, Thumb1InstrInfo and Thumb2InstrInfo. Similarly, the FrameLowering classes.
>
> If you're sharing that code between the various targets, it sounds like there's some very significant architectural problems in your port, to be honest.
>
>> Maybe I'm shooting myself in the foot there. I don't know that code...
2012 Sep 24
0
[LLVMdev] mips16 puzzle
...of awkward but does work except in this case of load/store haflword and byte to stack objects.
>
ARM has a similar problem. The InstrInfo classes should be factored out so that the targets have separate implementations where appropriate. See ARMBaseInstrInfo, ARMInstrInfo, Thumb1InstrInfo and Thumb2InstrInfo. Similarly, the FrameLowering classes.
If you're sharing that code between the various targets, it sounds like there's some very significant architectural problems in your port, to be honest.
> Maybe I'm shooting myself in the foot there. I don't know that code too well so mayb...
2012 Sep 26
0
[LLVMdev] mips16 puzzle
...except in this case of load/store haflword and byte to stack objects.
>>>
>>
>> ARM has a similar problem. The InstrInfo classes should be factored out so that the targets have separate implementations where appropriate. See ARMBaseInstrInfo, ARMInstrInfo, Thumb1InstrInfo and Thumb2InstrInfo. Similarly, the FrameLowering classes.
>>
>> If you're sharing that code between the various targets, it sounds like there's some very significant architectural problems in your port, to be honest.
>>
>>> Maybe I'm shooting myself in the foot there. I don...
2012 Sep 21
2
[LLVMdev] mips16 puzzle
Actually, SP is already not in the mips 16 register class but there is
some C++ code that is common to mips32, mips64 and mips16 that is
wanting to use SP. It's kind of awkward but does work except in this
case of load/store haflword and byte to stack objects.
Maybe I'm shooting myself in the foot there. I don't know that code too
well so maybe I need to look into it.
There are
2012 Sep 29
1
[LLVMdev] mips16 puzzle
...this case of load/store haflword and byte to stack objects.
>>>>
>>>
>>> ARM has a similar problem. The InstrInfo classes should be factored out so that the targets have separate implementations where appropriate. See ARMBaseInstrInfo, ARMInstrInfo, Thumb1InstrInfo and Thumb2InstrInfo. Similarly, the FrameLowering classes.
>>>
>>> If you're sharing that code between the various targets, it sounds like there's some very significant architectural problems in your port, to be honest.
>>>
>>>> Maybe I'm shooting myself in the foot t...
2015 Jul 13
2
[LLVMdev] [RFC] Conditional RegClass membership
...ead-only TableGen'd tables and switch blocks encoding the various classes,
subclasses, and their relationships. The approach I had taken in my patch
was to include ARMGenInstrInfo.inc for a second time, after re-defining
rGPRRegClassID to use a different RegClass in the same instructions. Then,
Thumb2InstrInfo constructor overrides the MCInstrInfo that it inherited from
ARMBaseInstrInfo with the "patched" one. (This "patching", still, happens at
compile-time.)
As John rightly noted, this approach looks rather hacky and confusing:
This isn't "rGPR includes SP" it&...