Displaying 1 result from an estimated 1 matches for "throughable_mask".
2008 Sep 27
0
[PATCH 8/9] qemu: enable HMV guest SR-IOV support
...(cfg_entry->data & valid_emu_mask));
+
+ return 0;
+}
+
/* read BAR */
static int pt_bar_reg_read(struct pt_dev *ptdev,
struct pt_reg_tbl *cfg_entry,
@@ -2337,14 +2408,18 @@ static int pt_cmd_reg_write(struct pt_dev *ptdev,
uint16_t writable_mask = 0;
uint16_t throughable_mask = 0;
uint16_t wr_value = *value;
+ uint16_t emu_mask = reg->emu_mask;
+
+ if (pt_is_vf(ptdev))
+ emu_mask |= PCI_COMMAND_MEMORY;
/* modify emulate register */
- writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask;
+ writable_mask = emu_mask &...