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2016 Mar 05
2
[AMDGPU] non-hsa intrinsic with hsa target
...3835db5e). In the linked bitcode
($LIBCLC_DIR/built_libs/tahiti-amdgcn--.bc), it has the following code
segment,
define linkonce_odr i32 @get_global_id(i32 %dim) #5 {
entry:
switch i32 %dim, label %get_local_id.exit [
i32 0, label %get_group_id.exit.thread
i32 1, label %get_group_id.exit.thread22
i32 2, label %get_group_id.exit.thread24
]
get_group_id.exit.thread: ; preds = %entry
%x.i = tail call i32 @llvm.amdgcn.workgroup.id.x() #13
%x.i12 = tail call i32 @llvm.r600.read.local.size.x() #3
%mul26 = mul i32 %x.i12, %x.i
%x.i4 = tail call i32 @llvm.amdg...
2016 Mar 05
2
[AMDGPU] non-hsa intrinsic with hsa target
Dear Developers,
I compiled a OpenCL kernel before (on Nov. last year) like
__kernel void g(__global float* array)
{
array[get_global_id(0)] = 1;
}
with libclc, which would originally use the instrinsics like
llvm.r600.read.local.size.x().
I executed the generated object file with one version of the hsa-runtime
[1] provided by Mr. Stellard, when there was more than one workgroup, the
output