Displaying 3 results from an estimated 3 matches for "thisinstr".
2012 Aug 01
3
[LLVMdev] TableGen related question for the Hexagon backend
...f switch tables. I am thinking of modeling these relations in
HexagonInstrInfo.td file and use TableGen to generate a table with the
information. Idea is to have a new class, say Relations, with some members
of type 'Instruction' each representing a specific relation between itself
and 'ThisInstr'.
For example:
class Relations {
Instruction ThisInstr;
Instruction BaseForm;
Instruction TruePred;
Instruction FalsePred;
}
def Rel_ADDrr : Relations<ADDrr, ADDrr, ADDrr_p, ADDrr_np>; def Rel_ADDrr_p
: Relations<ADDrr...
2012 Aug 02
0
[LLVMdev] TableGen related question for the Hexagon backend
...generate a table with the
> information.
That would be a good idea. X86 could also use some help with opcode mapping tables.
> Idea is to have a new class, say Relations, with some members
> of type 'Instruction' each representing a specific relation between itself
> and 'ThisInstr'.
>
> For example:
> class Relations {
> Instruction ThisInstr;
> Instruction BaseForm;
> Instruction TruePred;
> Instruction FalsePred;
> }
>
> def Rel_ADDrr : Relations<ADDrr, ADDrr, ADDrr_p, ADDrr_...
2012 Aug 16
2
[LLVMdev] TableGen related question for the Hexagon backend
...to generate a table with the information.
That would be a good idea. X86 could also use some help with opcode mapping
tables.
> Idea is to have a new class, say Relations, with some members of type
> 'Instruction' each representing a specific relation between itself and
> 'ThisInstr'.
>
> For example:
> class Relations {
> Instruction ThisInstr;
> Instruction BaseForm;
> Instruction TruePred;
> Instruction FalsePred;
> }
>
> def Rel_ADDrr : Relations<ADDrr, ADDrr, ADDrr_p, ADDrr_...