search for: tgsi_texture_2d

...ction_ext_texture *tex; + + assert(insn->Instruction.Extended); + tex = &insn->InstructionExtTexture; + + mask = 0x7; + if (insn->Instruction.Opcode == TGSI_OPCODE_TXP) + mask |= 0x8; + + switch (tex->Texture) { + case TGSI_TEXTURE_1D: + mask &= 0x9; + break; + case TGSI_TEXTURE_2D: + mask &= 0xb; + break; + default: + break; + } + } + return mask; + case TGSI_OPCODE_XPD: + x = 0; + if (mask & 1) x |= 0x6; + if (mask & 2) x |= 0x5; + if (mask & 4) x |= 0x3; + return x; + default: + break; + } + + return mask; +} + static struct nv50_reg * tgsi...

...gt;ureg, TGSI_OPCODE_MUL, &dst, 1, src, 2, 0); } /** @@ -334,9 +334,9 @@ compile_setupinst(struct st_translate *t, src[1] = t->samplers[r]; /* the texture target is still unknown, it will be fixed in the draw call */ ureg_tex_insn(t->ureg, TGSI_OPCODE_TEX, dst, 1, TGSI_TEXTURE_2D, - TGSI_RETURN_TYPE_FLOAT, NULL, 0, src, 2); + TGSI_RETURN_TYPE_FLOAT, NULL, 0, src, 2, 0); } else if (texinst->Opcode == ATI_FRAGMENT_SHADER_PASS_OP) { - ureg_insn(t->ureg, TGSI_OPCODE_MOV, dst, 1, src, 1); + ureg_insn(t->ureg, TGSI_OPCO...

Hi ! I've been trying to improve NV50 shader generation a bit the last couple of weeks, so here is what I've produced. I don't know if it's usable for you or just a pile of horrible hacks, but at least it makes some mesa demos render more correcly, p.e. the teapot (aside from mip-mapping issues of the floor texture), arbfplight, and I think the gears also didn't appear as they

Running Tomb Raider on Nouveau I found some flicker caused by ignoring precise modifiers on variables inside Nouveau. This series add precise/invariant handling to TGSI, which can be then used by drivers to disable certain unsafe optimisations which may otherwise alter calculations, which depend on having the same result across shaders. This series fixes this bug in Tomb Raider and one CTS test

Hello, I have my work on the nv vpe video decoder in a functional state. In case you didn't know this decoder accelerates mpeg2 video at the idct/mc level. I have verified that it works on nv40 hardware. I believe it works on nv30 hardware (and maybe some earlier hardware), but I cannot verify since I have none. I will reply with patches against the kernel, drm, ddx and mesa for