Displaying 11 results from an estimated 11 matches for "tgsi_semantic_generic".
2015 May 26
2
[PATCH 2/2] nv30/draw: switch varying hookup logic to know about texcoords
...@@ static const struct {
> [TGSI_SEMANTIC_BCOLOR ] = { EMIT_4F, INTERP_LINEAR , 1, 3, 0x00000004 },
> [TGSI_SEMANTIC_FOG ] = { EMIT_4F, INTERP_PERSPECTIVE, 5, 5, 0x00000010 },
> [TGSI_SEMANTIC_PSIZE ] = { EMIT_1F_PSIZE, INTERP_POS , 6, 6, 0x00000020 },
> - [TGSI_SEMANTIC_GENERIC ] = { EMIT_4F, INTERP_PERSPECTIVE, 8, 7, 0x00004000 }
> + [TGSI_SEMANTIC_TEXCOORD] = { EMIT_4F, INTERP_PERSPECTIVE, 8, 7, 0x00004000 },
> };
>
> static boolean
> vroute_add(struct nv30_render *r, uint attrib, uint sem, uint *idx)
> {
> - struct pipe_screen *pscre...
2015 May 26
2
[PATCH 2/2] nv30/draw: switch varying hookup logic to know about texcoords
...EMIT_4F, INTERP_LINEAR , 1, 3,
>>> 0x00000004 },
>>> [TGSI_SEMANTIC_FOG ] = { EMIT_4F, INTERP_PERSPECTIVE, 5, 5,
>>> 0x00000010 },
>>> [TGSI_SEMANTIC_PSIZE ] = { EMIT_1F_PSIZE, INTERP_POS , 6, 6,
>>> 0x00000020 },
>>> - [TGSI_SEMANTIC_GENERIC ] = { EMIT_4F, INTERP_PERSPECTIVE, 8, 7,
>>> 0x00004000 }
>>> + [TGSI_SEMANTIC_TEXCOORD] = { EMIT_4F, INTERP_PERSPECTIVE, 8, 7,
>>> 0x00004000 },
>>> };
>>> static boolean
>>> vroute_add(struct nv30_render *r, uint attrib, uint sem,...
2015 May 25
3
[PATCH 1/2] nv30/draw: rework some of the output vertex buffer logic
This makes the vertex buffer go to GART, not VRAM, and redoes the
mapping to not use the UNSYNCHRONIZED access (which is meaningless on a
VRAM buffer anyways). While we're at it, add some flushes for VBO data.
Moving the vertex buffer from VRAM to GART makes glxgears work fully
with NV30_SWTNL=1. The other changes just seem like a good idea. I'm not
sure *why* moving the buffer from VRAM
2014 May 10
1
[PATCH] nv50, nvc0: fix blit 3d path for 1d array textures
...b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
index 8addefe..23613d8 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c
@@ -698,6 +698,12 @@ nv50_blitter_make_fp(struct pipe_context *pipe,
tc = ureg_DECL_fs_input(
ureg, TGSI_SEMANTIC_GENERIC, 0, TGSI_INTERPOLATE_LINEAR);
+ if (ptarg == PIPE_TEXTURE_1D_ARRAY) {
+ /* Adjust coordinates. Depth is in z, but TEX expects it to be in y. */
+ tc = ureg_swizzle(tc, TGSI_SWIZZLE_X, TGSI_SWIZZLE_Z,
+ TGSI_SWIZZLE_Z, TGSI_SWIZZLE_Z);
+ }
+
data = ureg_DEC...
2009 Sep 12
0
[PATCH 13/13] nv50: add support for point sprites
...rd_mode has
+ * to be per FP input instead of per VP output
+ */
+ memset(pntc, 0, 8 * sizeof(uint32_t));
+
+ for (i = 0; i < fp->cfg.io_nr; i++) {
+ uint8_t sn, si, j = fp->cfg.io[i].tgsi_id;
+ unsigned n = popcnt4(fp->cfg.io[i].mask);
+
+ if (fp->info.input_semantic_name[i] != TGSI_SEMANTIC_GENERIC) {
+ m += n;
+ continue;
+ }
+
+ sn = vp->info.input_semantic_name[j];
+ si = vp->info.input_semantic_index[j];
+
+ if (j < fp->cfg.io_nr && sn == TGSI_SEMANTIC_GENERIC) {
+ ubyte mode =
+ nv50->rasterizer->pipe.sprite_coord_mode[si];
+
+ if (mode == PIPE_SP...
2014 Jun 15
4
[PATCH v2 0/3] ARB_viewport_array for nvc0
This patch-series implements the ARB_viewport_array for nvc0 and does
a little house-cleanig afterwords.
V2:
Add Release-Notes, mark this in GL3 as done for nvc0
Don't mark the scissors dirty when we don't need to do that
Tobias Klausmann (3):
nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
docs: update GL3.txt, relnotes: mark GL_ARB_viewport_array as done
2016 Jan 14
0
[PATCH] nv50/ir: only use FILE_LOCAL_MEMORY for temp arrays that use indirection
...based on relevant array sizes
+ if (indirectTempArrays.size())
info->bin.tlsSpace += (scan.file_max[TGSI_FILE_TEMPORARY] + 1) * 16;
if (info->io.genUserClip > 0) {
@@ -1046,6 +1061,7 @@ bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
unsigned sn = TGSI_SEMANTIC_GENERIC;
unsigned si = 0;
const unsigned first = decl->Range.First, last = decl->Range.Last;
+ const int arrayId = decl->Array.ArrayID;
if (decl->Declaration.Semantic) {
sn = decl->Semantic.Name;
@@ -1189,8 +1205,11 @@ bool Source::scanDeclaration(const struct tgsi_ful...
2014 Jun 15
0
[PATCH v2 1/3] nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
...C_PRIMID: return 0x060;
case TGSI_SEMANTIC_LAYER: return 0x064;
- case NV50_SEMANTIC_VIEWPORTINDEX: return 0x068;
+ case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068;
case TGSI_SEMANTIC_PSIZE: return 0x06c;
case TGSI_SEMANTIC_POSITION: return 0x070;
case TGSI_SEMANTIC_GENERIC: return ubase + si * 0x10;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 3e6b011..3fdb6ae 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -183,7 +183,7 @@ n...
2014 Jun 14
0
[PATCH 1/3] nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
...C_PRIMID: return 0x060;
case TGSI_SEMANTIC_LAYER: return 0x064;
- case NV50_SEMANTIC_VIEWPORTINDEX: return 0x068;
+ case TGSI_SEMANTIC_VIEWPORT_INDEX:return 0x068;
case TGSI_SEMANTIC_PSIZE: return 0x06c;
case TGSI_SEMANTIC_POSITION: return 0x070;
case TGSI_SEMANTIC_GENERIC: return ubase + si * 0x10;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 3e6b011..3fdb6ae 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -183,7 +183,7 @@ n...
2014 Jun 14
7
[PATCH 0/3] ARB_viewport_array for nvc0
This patch-series implements the ARB_viewport_array for nvc0 and does
a little house-cleanig afterwords.
Tobias Klausmann (3):
nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
nvc0: mark scissor in nvc0_clear_{}
nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX and its last consumer
.../drivers/nouveau/codegen/nv50_ir_driver.h | 1 -
2010 Aug 06
4
nv vpe video decoder
Hello,
I have my work on the nv vpe video decoder in a functional
state. In case you didn't know this decoder accelerates mpeg2
video at the idct/mc level. I have verified that it works on
nv40 hardware. I believe it works on nv30 hardware (and
maybe some earlier hardware), but I cannot verify since I have
none.
I will reply with patches against the kernel, drm, ddx
and mesa for