Displaying 6 results from an estimated 6 matches for "tgsi_opcode_ushr".
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tgsi_opcode_ishr
2014 May 21
2
[Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result
...@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
> case TGSI_OPCODE_IMUL_HI:
> case TGSI_OPCODE_UMUL_HI:
> case TGSI_OPCODE_OR:
> - case TGSI_OPCODE_POW:
> case TGSI_OPCODE_SHL:
> case TGSI_OPCODE_ISHR:
> case TGSI_OPCODE_USHR:
> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
> FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
> mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
> break;
> + case TGSI_OPCODE_POW:
> + val0 = mkOp2v(op, T...
2014 May 21
2
[Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result
...struct tgsi_full_instruction *insn)
>>> case TGSI_OPCODE_IMUL_HI:
>>> case TGSI_OPCODE_UMUL_HI:
>>> case TGSI_OPCODE_OR:
>>> - case TGSI_OPCODE_POW:
>>> case TGSI_OPCODE_SHL:
>>> case TGSI_OPCODE_ISHR:
>>> case TGSI_OPCODE_USHR:
>>> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>> FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>> mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>>> break;
>>> + case TGSI_OPC...
2014 May 20
0
[PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result
...eau/codegen/nv50_ir_from_tgsi.cpp
@@ -2199,7 +2199,6 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
case TGSI_OPCODE_IMUL_HI:
case TGSI_OPCODE_UMUL_HI:
case TGSI_OPCODE_OR:
- case TGSI_OPCODE_POW:
case TGSI_OPCODE_SHL:
case TGSI_OPCODE_ISHR:
case TGSI_OPCODE_USHR:
@@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
break;
+ case TGSI_OPCODE_POW:
+ val0 = mkOp2v(op, TYPE_F32, getScratch(), fetchSr...
2014 May 21
0
[Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result
...er::handleInstruction(const struct tgsi_full_instruction *insn)
>> case TGSI_OPCODE_IMUL_HI:
>> case TGSI_OPCODE_UMUL_HI:
>> case TGSI_OPCODE_OR:
>> - case TGSI_OPCODE_POW:
>> case TGSI_OPCODE_SHL:
>> case TGSI_OPCODE_ISHR:
>> case TGSI_OPCODE_USHR:
>> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>> FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>> mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>> break;
>> + case TGSI_OPCODE_POW:
>> +...
2014 May 21
0
[Mesa-dev] [PATCH 04/12] nv50/ir/tgsi: TGSI_OPCODE_POW replicates its result
...*insn)
>>>> case TGSI_OPCODE_IMUL_HI:
>>>> case TGSI_OPCODE_UMUL_HI:
>>>> case TGSI_OPCODE_OR:
>>>> - case TGSI_OPCODE_POW:
>>>> case TGSI_OPCODE_SHL:
>>>> case TGSI_OPCODE_ISHR:
>>>> case TGSI_OPCODE_USHR:
>>>> @@ -2254,6 +2253,11 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
>>>> FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
>>>> mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
>>>> break;
>>>&g...
2014 May 20
14
[PATCH 00/12] Cherry-pick nv50/nvc0 patches from gallium-nine
I went through the gallium-nine tree and picked out nouveau patches that are
general bug-fixes. The first bunch I'd like to also get into 10.2. I've
reviewed all of them and they make sense to me, but sending them out for
public review as well in case there are any objections.
Unless I hear objections, I'd like to push this by Friday.
Christoph Bumiller (11):
nv50,nvc0: always pull