Displaying 9 results from an estimated 9 matches for "tgsi_full_token".
2009 Jun 21
0
[PATCH] nv50: better insn generation
...a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index d7ab28a..5594560 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -1294,18 +1294,20 @@ static boolean
nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
{
const struct tgsi_full_instruction *inst = &tok->FullInstruction;
- struct nv50_reg *rdst[4], *dst[4], *src[3][4], *temp;
- unsigned mask, sat, unit;
+ struct nv50_reg *rdst[4], *dst[4], *src[3][4];
+ struct nv50_reg **pp_rtmp, *rtmp = NULL, *temp = NULL;
+ unsigned mask, sat, uni...
2009 Sep 10
0
[PATCH 01/13] nv50: extend insn src mask function
...mask & 2) x |= 0x5;
+ if (mask & 4) x |= 0x3;
+ return x;
+ default:
+ break;
+ }
+
+ return mask;
+}
+
static struct nv50_reg *
tgsi_dst(struct nv50_pc *pc, int c, const struct tgsi_full_dst_register *dst)
{
@@ -1310,13 +1374,18 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i];
+ unsigned src_mask;
+ boolean neg_supp;
+
+ src_mask = nv50_tgsi_src_mask(inst, i);
+ neg_supp = negate_supported(inst, i);
if (fs->SrcRe...
2009 May 06
2
nv50: shader generation patches
Hi ! I've been trying to improve NV50 shader generation a bit the last couple of weeks, so here is
what I've produced. I don't know if it's usable for you or just a pile of horrible hacks, but at
least it makes some mesa demos render more correcly, p.e. the teapot (aside from mip-mapping issues
of the floor texture), arbfplight, and I think the gears also didn't appear as they
2009 Jun 21
0
[PATCH] nv50: support for SLE, SNE, SEQ, SGT
...static INLINE void
emit_abs(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
{
- emit_cvt(pc, dst, src, -1, CVTOP_ABS, CVT_F32_F32);
+ emit_cvt(pc, dst, -1, src, CVTOP_ABS, CVT_F32_F32);
}
static void
@@ -1611,13 +1654,6 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
if (mask & (1 << 3))
emit_mov_immdval(pc, dst[3], 1.0);
break;
- case TGSI_OPCODE_SGE:
- for (c = 0; c < 4; c++) {
- if (!(mask & (1 << c)))
- continue;
- emit_set(pc, 6, dst[c], src[0][c], src[1][c]);
- }
- break;
case TGSI_OPCODE_SIN:
temp = t...
2009 Sep 10
0
[PATCH 02/13] nv50: add functions for swizzle resolution
...x0;
+ case TGSI_OPCODE_IF:
+ case TGSI_OPCODE_KIL:
+ /* don't call this function for these ops */
+ assert(0);
+ break;
default:
- return TRUE;
+ /* linear vector instruction */
+ return (1 << c);
}
}
@@ -1393,25 +1432,6 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
rdst[c] = dst[c];
dst[c] = temp_temp(pc);
}
- } else
- if (direct2dest_op(inst)) {
- for (c = 0; c < 4; c++) {
- if (!dst[c] || dst[c]->type != P_TEMP)
- continue;
-
- for (i = c + 1; i < 4; i++) {
- if (dst[c] == src[0][i] ||
- dst[c] == src[1][i] ||
-...
2009 Jun 21
0
[PATCH] nv50: initial support for IF, ELSE, ENDIF insns
...->inst[0] = 0xf0000000;
+ if (full) {
+ set_long(pc, e);
+ e->inst[1] = 0xe0000000;
+ }
+ emit(pc, e);
+}
+
+static void
convert_to_long(struct nv50_pc *pc, struct nv50_program_exec *e)
{
unsigned q = 0, m = ~0;
@@ -1420,6 +1474,22 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
FREE(one);
}
break;
+ case TGSI_OPCODE_ELSE:
+ emit_branch(pc, -1, 0, NULL);
+ pc->if_insn[--pc->if_lvl]->bra = (1 << 31) | pc->p->exec_size;
+ pc->if_insn[pc->if_lvl++] = pc->p->exec_tail;
+ break;
+ case TGSI_OPCODE_ENDIF:
+ i = pc->p->exe...
2009 Sep 12
0
[PATCH 10/13] nv50: proper linkage between VP and FP
...NE unsigned
+popcnt4(uint32_t val)
+{
+ static const unsigned cnt[16]
+ = { 0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4 };
+ return cnt[val & 0xf];
+}
+
static void
alloc_reg(struct nv50_pc *pc, struct nv50_reg *reg)
{
@@ -1972,59 +1980,48 @@ nv50_tgsi_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
return TRUE;
}
-static unsigned
-load_fp_attrib(struct nv50_pc *pc, int i, int *mid, int *aid, int *p_oid)
+static void
+load_interpolant(struct nv50_pc *pc, struct nv50_reg *reg)
{
- struct nv50_reg *iv;
- int oid, c, n;
- unsigned mask = 0;
-
- iv = (pc->interp_mode[i] & INTERP...
2009 Sep 12
0
[PATCH 09/13] nv50: move allocation of pc regs
...[2]);
emit_kil(pc, src[0][3]);
- pc->p->cfg.fp.regs[2] |= 0x00100000;
break;
case TGSI_OPCODE_LIT:
emit_lit(pc, &dst[0], mask, &src[0][0]);
@@ -1754,64 +1753,52 @@ nv50_program_tx_insn(struct nv50_pc *pc,
}
static void
-prep_inspect_insn(struct nv50_pc *pc, const union tgsi_full_token *tok,
- unsigned *r_usage[2])
+prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
{
- const struct tgsi_full_instruction *insn;
+ struct nv50_reg *reg = NULL;
const struct tgsi_full_src_register *src;
const struct tgsi_dst_register *dst;
+ unsigned i, c, k, mask...
2009 Jun 24
0
[PATCH] nv50: fix previous patches
...45,7 @@ set_immd(struct nv50_pc *pc, struct nv50_reg *imm, struct nv50_program_exec *e)
#define INTERP_LINEAR 0
-#define INTERP_FLAT 1
+#define INTERP_FLAT 1
#define INTERP_PERSPECTIVE 2
#define INTERP_CENTROID 4
@@ -1852,6 +1853,10 @@ prep_inspect_insn(struct nv50_pc *pc, const union tgsi_full_token *tok,
dst = &insn->FullDstRegisters[0].DstRegister;
mask = dst->WriteMask;
+#ifdef NV50_PROGRAM_DUMP
+ tgsi_dump_instruction(insn, 1);
+#endif
+
if (dst->File == TGSI_FILE_TEMPORARY) {
for (c = 0; c < 4; c++) {
if (!(mask & (1 << c)))
@@ -1900,13 +1905,14 @@...