Displaying 20 results from an estimated 33 matches for "tfi".
Did you mean:
fi
2011 Aug 24
1
[LLVMdev] Segmented Stacks (re-roll)
...a87 100644
--- a/lib/CodeGen/StackSegmenter.cpp
+++ b/lib/CodeGen/StackSegmenter.cpp
@@ -40,7 +40,10 @@ void StackSegmenter::getAnalysisUsage(AnalysisUsage
&info) const {
}
bool StackSegmenter::runOnMachineFunction(MachineFunction &MF) {
- return false;
+ const TargetFrameLowering &TFI = *MF.getTarget().getFrameLowering();
+ TFI.adjustForSegmentedStacks(MF);
+ // adjustForSegmentedStacks always changes the MachineFunction
+ return true;
}
FunctionPass *llvm::createStackSegmenter() {
--
Sanjoy Das
http://playingwithpointers.com
2013 Sep 26
0
[LLVMdev] Register scavenger and SP/FP adjustments
...// need to track the SP adjustment for frame index elimination.
if (TFI->canSimplifyCallFramePseudos(Fn))
=> TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
Perhaps there is a bug in canSimplifyCallFramePseudos?
Evan
On Sep 26, 2013, at 12:00 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:
> Consider this example:
>...
2013 Sep 25
2
[LLVMdev] Register scavenger and SP/FP adjustments
...hine &TM = Fn.getTarget();
assert(TM.getRegisterInfo() &&
"TM::getRegisterInfo() must be implemented!");
const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
const TargetFrameLowering *TFI = TM.getFrameLowering();
bool StackGrowsDown =
TFI->getStackGrowthDirection() ==
TargetFrameLowering::StackGrowsDown;
int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
if (RS && !FrameIndex...
2011 Oct 11
1
[LLVMdev] Expected behavior of eliminateFrameIndex() on dbg_value machine instructions
...= DVInsn->getOperand(0);
const TargetRegisterInfo *TRI = Asm->TM.getRegisterInfo();
if (DVInsn->getOperand(1).isImm() &&
TRI->getFrameRegister(*Asm->MF) == RegOp.getReg()) {
unsigned FrameReg = 0;
const TargetFrameLowering *TFI = Asm->TM.getFrameLowering();
int Offset =
TFI->getFrameIndexReference(*Asm->MF,
DVInsn->getOperand(1).getImm(),
FrameReg);
MachineLocation Location(FrameReg, Offset);...
2013 Sep 26
1
[LLVMdev] Register scavenger and SP/FP adjustments
...s are not being included as part of the stack frame, and
> // the target doesn't indicate otherwise, remove the call frame pseudos
> // here. The sub/add sp instruction pairs are still inserted, but we don't
> // need to track the SP adjustment for frame index elimination.
> if (TFI->canSimplifyCallFramePseudos(Fn))
> => TFI->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
>
> Perhaps there is a bug in canSimplifyCallFramePseudos?
>
> Evan
>
> On Sep 26, 2013, at 12:00 PM, Krzysztof Parzyszek
> <kparzysz at codeaurora.org <ma...
2013 Sep 26
2
[LLVMdev] Register scavenger and SP/FP adjustments
...> assert(TM.getRegisterInfo() &&
>> "TM::getRegisterInfo() must be implemented!");
>> const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
>> const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
>> const TargetFrameLowering *TFI = TM.getFrameLowering();
>> bool StackGrowsDown =
>> TFI->getStackGrowthDirection() ==
>> TargetFrameLowering::StackGrowsDown;
>> int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
>> int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode()...
2008 Jun 30
2
[LLVMdev] Recently failing vector tests
...works.
> if (!RegInfo->targetHandlesStackFrameRounding() &&
> (FFI->hasCalls() || FFI->hasVarSizedObjects() ||
> - RegInfo->needsStackRealignment(Fn))) {
> + (RegInfo->needsStackRealignment(Fn) &&
> + Offset > std::abs(TFI.getOffsetOfLocalArea())))) {
> // If we have reserved argument space for call sites in the
> function
> // immediately on entry to the current function, count it as
> part of the
> // overall stack size.
>
> _______________________________________________...
2013 Nov 18
2
[LLVMdev] Unaligned load/store for callee-saved 128-bit registers
...= MFI->CreateStackObject(RC->getSize(), Align, true);
This will create unaligned load/store for a callee-saved 128-bit register
on the frame slot because StackAlign is 4.
Adding a check for stack realignable or putting all the 128-bit registers
as caller-save will fix the problem.
if (!TFI->isStackRealignable()) <--- new line
Align = std::min(Align, StackAlign);
Is this a bug or am I missing something?
Thanks,
Francois Pichet, Octasic.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attac...
2013 Nov 21
2
[LLVMdev] Unaligned load/store for callee-saved 128-bit registers
...a callee-saved 128-bit
> > > register on the frame slot because StackAlign is 4.
> > >
> > >
> > > Adding a check for stack realignable or putting all the 128-bit
> > > registers as caller-save will fix the problem.
> > >
> > > if (!TFI->isStackRealignable()) <--- new line
> > > Align = std::min(Align, StackAlign);
> > >
> > > Is this a bug or am I missing something?
> > >
> >
> > This looks like a bug. By default, isStackRealignable() always
> > returns true (this def...
2008 Apr 28
1
[LLVMdev] FoldingSetNodeID operations inefficiency
...are put into a new node TF2 and so on. That is, each generated TF contains a previous TF as its first operand and a bunch of pending loads:
___TF2______
/ | \
TF1 LD2.1 .. LD2.64
/ \
LD1.1..LD1.64
2) Every 64 loads are put into a new TF node TFi. Then all such TFs are put into a big parent TF, that has only these TFi nodes as operands:
_____TF______
/ \
TF1 ... __TFk__
/ \ / \
LD1.1..LD1.64 LDk.1...LDk.64
These changes (a) and (b) significantely redu...
2013 Sep 26
0
[LLVMdev] Register scavenger and SP/FP adjustments
...Fn.getTarget();
> assert(TM.getRegisterInfo() &&
> "TM::getRegisterInfo() must be implemented!");
> const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
> const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
> const TargetFrameLowering *TFI = TM.getFrameLowering();
> bool StackGrowsDown =
> TFI->getStackGrowthDirection() ==
> TargetFrameLowering::StackGrowsDown;
> int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
> int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
>
> if (RS...
2011 Aug 23
0
[LLVMdev] Segmented Stacks (re-roll)
On Aug 23, 2011, at 9:24 AM, Sanjoy Das wrote:
> Hi!
>
>> diff --git a/lib/CodeGen/StackSegmenter.cpp b/lib/CodeGen/StackSegmenter.cpp
>> new file mode 100644
>> index 0000000..5ffb8f2
>> --- /dev/null
>> +++ b/lib/CodeGen/StackSegmenter.cpp
>> @@ -0,0 +1,48 @@
>> +//===-- StackSegmenter.h - Prolog/Epilog code insertion -------*- C++ -* --===//
2008 Jun 27
0
[LLVMdev] Recently failing vector tests
...@ -464,7 +464,8 @@
// works.
if (!RegInfo->targetHandlesStackFrameRounding() &&
(FFI->hasCalls() || FFI->hasVarSizedObjects() ||
- RegInfo->needsStackRealignment(Fn))) {
+ (RegInfo->needsStackRealignment(Fn) &&
+ Offset > std::abs(TFI.getOffsetOfLocalArea())))) {
// If we have reserved argument space for call sites in the
function
// immediately on entry to the current function, count it as
part of the
// overall stack size.
2016 Jul 13
2
IPRA, interprocedural register allocation, question
Mehdi,
I am perusing the 3.8 trunk sources, and don’t find evidence where I
would expect it for LLVM “downgrading” a function’s calling convention.
PrologEpilogEmitter() { “CodeGen/”
...
TFI->determineCalleeSaves() { “Target/XYZ/”
TargetFrameLowering::determineCalleeSaves() { “CodeGen/”
Return <<< some object derived from “*CallingConv.td” >>>; “build/lib/Target/XYX/”
}
...
SavedRegs.set(Reg);...
2011 Aug 23
2
[LLVMdev] Segmented Stacks (re-roll)
Hi!
> diff --git a/lib/CodeGen/StackSegmenter.cpp b/lib/CodeGen/StackSegmenter.cpp
> new file mode 100644
> index 0000000..5ffb8f2
> --- /dev/null
> +++ b/lib/CodeGen/StackSegmenter.cpp
> @@ -0,0 +1,48 @@
> +//===-- StackSegmenter.h - Prolog/Epilog code insertion -------*- C++ -* --===//
>
> The comment is obviously incorrect.
Thanks. So much for lifting file
2011 Oct 10
0
[LLVMdev] Expected behavior of eliminateFrameIndex() on dbg_value machine instructions
On Oct 10, 2011, at 10:26 AM, Richard Osborne wrote:
> I'm investigating a bug associated with debug information that manifests
> itself in the XCore backend (PR11105). I'd like to understand what the
> expected behavior of eliminateFrameIndex() is when it is called on a
> dbg_value machine instruction.
That is up to the target.
The TII::emitFrameIndexDebugValue() hook is
2008 Jun 27
2
[LLVMdev] Recently failing vector tests
Running on x86-64 linux:
FAIL: test/CodeGen/X86/vec_ins_extract.ll
Failed with exit(1) at line 1
while running: llvm-as < test/CodeGen/X86/vec_ins_extract.ll | opt -scalarrepl -instcombine | llc -march=x86 -mcpu=yonah | not grep sub.*esp
subl $16, %esp
subl $16, %esp
subl $16, %esp
subl $16, %esp
child process exited abnormally
FAIL:
2008 Jun 30
0
[LLVMdev] Recently failing vector tests
...if (!RegInfo->targetHandlesStackFrameRounding() &&
>> (FFI->hasCalls() || FFI->hasVarSizedObjects() ||
>> - RegInfo->needsStackRealignment(Fn))) {
>> + (RegInfo->needsStackRealignment(Fn) &&
>> + Offset > std::abs(TFI.getOffsetOfLocalArea())))) {
>> // If we have reserved argument space for call sites in the
>> function
>> // immediately on entry to the current function, count it as
>> part of the
>> // overall stack size.
>>
>> ___________________________...
2008 Jun 30
1
[LLVMdev] Recently failing vector tests
...argetHandlesStackFrameRounding() &&
> >> (FFI->hasCalls() || FFI->hasVarSizedObjects() ||
> >> - RegInfo->needsStackRealignment(Fn))) {
> >> + (RegInfo->needsStackRealignment(Fn) &&
> >> + Offset > std::abs(TFI.getOffsetOfLocalArea())))) {
> >> // If we have reserved argument space for call sites in the
> >> function
> >> // immediately on entry to the current function, count it as
> >> part of the
> >> // overall stack size.
> >>
> &...
2011 Jun 15
0
[LLVMdev] Custom allocation orders
...btarget>();
if (Subtarget.is64Bit())
return X86_GR8_AO_64;
else
return begin();
}
GR8Class::iterator
GR8Class::allocation_order_end(const MachineFunction &MF) const {
const TargetMachine &TM = MF.getTarget();
const TargetFrameLowering *TFI = TM.getFrameLowering();
const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>();
const X86MachineFunctionInfo *MFI = MF.getInfo<X86MachineFunctionInfo>();
// Does the function dedicate RBP / EBP to being a frame ptr?
if (!Subtarget.is64Bit())...