Displaying 5 results from an estimated 5 matches for "texprep".
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exprep
2014 May 13
1
[PATCH 1/2] nv50/ir: make sure that texprep/texquerylod's args get coalesced
...llium/drivers/nouveau/codegen/nv50_ir_ra.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
@@ -998,7 +998,9 @@ GCRA::doCoalesce(ArrayList& insns, unsigned int mask)
case OP_TXQ:
case OP_TXD:
case OP_TXG:
+ case OP_TXLQ:
case OP_TEXCSAA:
+ case OP_TEXPREP:
if (!(mask & JOIN_MASK_TEX))
break;
for (c = 0; insn->srcExists(c) && c != insn->predSrc; ++c)
--
1.8.5.5
2014 Apr 18
0
[PATCH] nouveau/codegen: add missing values for OP_TXLQ into the target arrays
...TRAINT
@@ -44,7 +44,7 @@ const uint8_t Target::operationSrcNr[OP_LAST + 1] =
1, 1, 2, 1, 2, // VFETCH, PFETCH, EXPORT, LINTERP, PINTERP
1, 1, // EMIT, RESTART
1, 1, 1, // TEX, TXB, TXL,
- 1, 1, 1, 1, 1, 2, // TXF, TXQ, TXD, TXG, TEXCSAA, TEXPREP
+ 1, 1, 1, 1, 1, 1, 2, // TXF, TXQ, TXD, TXG, TXLQ, TEXCSAA, TEXPREP
1, 1, 2, 2, 2, 2, 2, // SULDB, SULDP, SUSTB, SUSTP, SUREDB, SUREDP, SULEA
3, 3, 3, 3, // SUBFM, SUCLAMP, SUEAU, MADSP
0, // TEXBAR
@@ -57,7 +57,7 @@ const uint8_t Target::operat...
2014 Feb 28
0
[PATCH] nv50: enable texture query lod
...au/codegen/nv50_ir.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
@@ -117,6 +117,7 @@ enum operation
OP_TXQ, // texture size query
OP_TXD, // texture derivatives
OP_TXG, // texture gather
+ OP_TXLQ, // texture query lod
OP_TEXCSAA, // texture op for coverage sampling
OP_TEXPREP, // turn cube map array into 2d array coordinates
OP_SULDB, // surface load (raw)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
index bef103f..0b0d480 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_em...
2014 Feb 28
2
Tesla shader ISA question
Hello,
I've recently run into an unknown bit in Tesla shaders, and was hoping
you could shed some light on it. I believe they're related to clamping
of some sort. Here are 2 examples (from diff shaders):
a0000401 cc054780 cvt rpi f32 $r0 f32 $r2 [unknown: 00000000 00010000]
a000060d 8c014780 cvt rni s32 $r3 f32 $r3 [unknown: 00000000 00010000]
[This is intel-style syntax, cvt =
2012 Nov 28
12
[Bug 57660] New: nv?? show error nv??_screen_get_param:??? - unknown PIPE_CAP 76
https://bugs.freedesktop.org/show_bug.cgi?id=57660
Priority: medium
Bug ID: 57660
Assignee: nouveau at lists.freedesktop.org
Summary: nv?? show error nv??_screen_get_param:??? - unknown
PIPE_CAP 76
Severity: normal
Classification: Unclassified
OS: Linux (All)
Reporter: mustrumr97 at gmail.com