Displaying 6 results from an estimated 6 matches for "tex_int".
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2016 Feb 15
2
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...struct util_format_description *desc;
> + const struct nvc0_format *fmt;
> + uint64_t address;
> + uint32_t *tic;
> + uint32_t swz[4];
> + uint32_t width, height;
> + uint32_t depth;
> + struct nv50_tic_entry *view;
> + struct nv50_miptree *mt;
> + bool tex_int;
> +
> + view = MALLOC_STRUCT(nv50_tic_entry);
> + if (!view)
> + return NULL;
> + mt = nv50_miptree(texture);
> +
> + view->pipe = *templ;
> + view->pipe.reference.count = 1;
> + view->pipe.texture = NULL;
> + view->pipe.context = pipe;...
2016 Feb 15
0
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...enum pipe_texture_target target)
+{
+ const struct util_format_description *desc;
+ const struct nvc0_format *fmt;
+ uint64_t address;
+ uint32_t *tic;
+ uint32_t swz[4];
+ uint32_t width, height;
+ uint32_t depth;
+ struct nv50_tic_entry *view;
+ struct nv50_miptree *mt;
+ bool tex_int;
+
+ view = MALLOC_STRUCT(nv50_tic_entry);
+ if (!view)
+ return NULL;
+ mt = nv50_miptree(texture);
+
+ view->pipe = *templ;
+ view->pipe.reference.count = 1;
+ view->pipe.texture = NULL;
+ view->pipe.context = pipe;
+
+ view->id = -1;
+
+ pipe_resource_refere...
2016 Feb 15
0
[PATCH 23/23] nvc0: implement support for maxwell texture headers
...c;
>> + const struct nvc0_format *fmt;
>> + uint64_t address;
>> + uint32_t *tic;
>> + uint32_t swz[4];
>> + uint32_t width, height;
>> + uint32_t depth;
>> + struct nv50_tic_entry *view;
>> + struct nv50_miptree *mt;
>> + bool tex_int;
>> +
>> + view = MALLOC_STRUCT(nv50_tic_entry);
>> + if (!view)
>> + return NULL;
>> + mt = nv50_miptree(texture);
>> +
>> + view->pipe = *templ;
>> + view->pipe.reference.count = 1;
>> + view->pipe.texture = NULL;
>...
2016 Feb 15
24
[PATCH 01/23] nv50: import updated g80_defs.xml.h from rnndb
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++
1 file changed, 279 insertions(+)
create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
2015 Dec 19
2
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
...*pipe,
desc = util_format_description(view->pipe.format);
- tic[0] = nvc0_format_table[view->pipe.format].tic;
+ tic[0] = nvc0_format_table[view->pipe.format].tic & 0x3f;
+ if (nvc0_format_table[view->pipe.format].tic & 0x40)
+ tic[0] |= 1U << 31;
tex_int = util_format_is_pure_integer(view->pipe.format);
--
2.4.10
2015 Dec 19
0
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
...= nvc0_format_table[view->pipe.format].tic;
> + tic[0] = nvc0_format_table[view->pipe.format].tic & 0x3f;
Naturally this needs to be ~0x40. Oops. Fixed locally.
> + if (nvc0_format_table[view->pipe.format].tic & 0x40)
> + tic[0] |= 1U << 31;
>
> tex_int = util_format_is_pure_integer(view->pipe.format);
>
> --
> 2.4.10
>