Displaying 2 results from an estimated 2 matches for "test_sext_icmp_i32".
2014 Jul 08
2
[LLVMdev] LLVM commit 410f38e01597120b41e406ec1cea69127463f9e5
...> The setcc type is i64 for the i64 icmp, so it then needs to be truncated
> to 32-bits in this situation
>
>
I understand this? Why does the setcc needs to be truncated ? It doesn't
look like it usually is.
I have a test case which is exactly the other way around :
define i32 @test_sext_icmp_i32(i32 %arg) {
%x = icmp eq i32 %arg, 0
%y = sext i1 %x to i64
ret i64 %y
}
The DAG.getSExtOrTrunc(SetCC, DL, SelectVT) is returning the node
DAGCombiner is working on, which create a loop after the substitution. If I
have X = (i64 (sext (i32 (setcc A B)))) to be "combined" as (select...
2014 Jul 08
2
[LLVMdev] LLVM commit 410f38e01597120b41e406ec1cea69127463f9e5
OK from what I understand, the DAG.getSExtOrTrunc(SetCC, DL, SelectVT) is
unecessary and the SelectVT is nto the right type (as it is called with
incorrect parameter).
Here is a patch so it won't generate a loop. I ran make check and it
doesn't look like anything is broken.
2014-07-07 11:36 GMT-07:00 Matt Arsenault <arsenm2 at gmail.com>:
>
> On Jul 5, 2014, at 7:14 PM,