Displaying 3 results from an estimated 3 matches for "test_op".
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test_opt
2014 Jul 11
2
[LLVMdev] Lowering to return multiple values: codeGen, instruction write one value to the input register.
...perand(2) , Op.getOperand(3));
SDValue Crc(Data.getNode(), 1);
SDValue Results[] = { Crc, Data };
return DAG.getMergeValues(Results, 2, DL);
“ which is used to lower an instruction that returns two values.
I am trying to something like this:
”
…….
SDValue z = DAG.getNode(my_ISD::test_op, DL, VT, Op.getOperand(0);
SDValue w = DAG.getConstant(1, MVT::i32);
SDValue DataZ = DAG.getNode(ISD::BUILDER_VECTOR, DL, MVT::v4i32, z, z, z, z);
SDValue DataW = DAG.getNode(ISD::BUILDER_VECTOR, DL, MVT::v4i32, w, w, w, w);
SDValue result[] = {DataZ, DataW};
return DAg.getMergeValues(results, 2,...
2014 Jul 07
2
[LLVMdev] codeGen, instruction write one value to the input register.
Tks Cameron,
I did some study on it.
Now I am having the same problem as mentioned in this thread;"http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-January/057654.html” ,
> Looking at the X86 back-end code, it looks like there do exist
> multi-output instructions, but they all use physical (implicit) registers
> for the second destination, not arbitrary register types. And if I
2016 Jul 15
3
[PATCH 1/4] Create a simple project to create version.h to run before any other
...---------
8 files changed, 261 insertions(+), 67 deletions(-)
create mode 100644 win32/VS2015/generate_version.vcxproj
diff --git a/Makefile.am b/Makefile.am
index 7a69114..b7ede81 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -185,6 +185,7 @@ EXTRA_DIST = version.mk \
win32/VS2015/test_opus_decode.vcxproj \
win32/VS2015/celt.vcxproj \
win32/VS2015/opus.sln \
+ win32/VS2015/generate_version.vcxproj \
win32/genversion.bat \
win32/config.h
diff --git a/win32/VS2015/celt.vcxproj b/win32/VS2015/celt.vcxproj
index 273ee...