Displaying 20 results from an estimated 280 matches for "tesla".
2016 Jun 16
0
Unable to mount a USB DVD drive
...ev=01.06
S: Manufacturer=Initio
S: Product=RW/DVD_GCC-T10N
S: SerialNumber=0000000000000000W
C: #Ifs= 1 Cfg#= 1 Atr=c0 MxPwr=2mA
I: If#= 0 Alt= 0 #EPs= 2 Cls=08(stor.) Sub=05 Prot=50 Driver=(none)
--SNIP--
This is what tail -f /var/log/messages looks like on my F21 laptop:
Jun 15 18:41:35 tesla kernel: [ 913.678526] usb 1-2: new high-speed USB
device number 5 using xhci_hcd
Jun 15 18:41:35 tesla kernel: usb 1-2: new high-speed USB device number 5
using xhci_hcd
Jun 15 18:41:36 tesla kernel: [ 913.843709] usb 1-2: New USB device found,
idVendor=13fd, idProduct=1040
Jun 15 18:41:36 tes...
2009 Dec 25
0
[MESA PATCH 5/5] nv50: update after nouveau_class.h update
...program.c b/src/gallium/drivers/nv50/nv50_program.c
index a101ac0..d3b0180 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -3498,7 +3498,7 @@ nv50_fragprog_validate(struct nv50_context *nv50)
so_data (so, p->cfg.high_temp);
so_method(so, tesla, NV50TCL_FP_RESULT_COUNT, 1);
so_data (so, p->cfg.high_result);
- so_method(so, tesla, NV50TCL_FP_CTRL_UNK19A8, 1);
+ so_method(so, tesla, NV50TCL_FP_CONTROL, 1);
so_data (so, p->cfg.regs[2]);
so_method(so, tesla, NV50TCL_FP_CTRL_UNK196C, 1);
so_data (so, p->cfg.regs[3]);
diff -...
2009 Oct 14
0
[PATCH 3/7] nv50: submit user vbo data through the fifo
...ys(struct nv50_context *, unsigned, unsigned);
+
static INLINE unsigned
nv50_prim(unsigned mode)
{
@@ -132,6 +144,7 @@ nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
struct nv50_context *nv50 = nv50_context(pipe);
struct nouveau_channel *chan = nv50->screen->tesla->channel;
struct nouveau_grobj *tesla = nv50->screen->tesla;
+ boolean ret;
nv50_state_validate(nv50);
@@ -142,17 +155,22 @@ nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1);
OUT_RING (chan, nv50_prim...
2009 Oct 10
0
[PATCH 1/7] nv50: use SIFC for TIC, TSC upload
...nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index dd7baec..66361dc 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -364,48 +364,31 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
so_data (so, 0x00000131 | (NV50_CB_PFP << 12));
- /* Texture sampler/image unit setup - we abuse the constant buffer
- * upload mechanism for the moment to upload data to the tex config
- * blocks. At some point we *may* want to go the NVIDIA way of doing...
2023 Jun 28
1
horizontal grouped stacked plots and removing space between bars
...16 -s
MD_15NM_WATER.tpr -nsteps 10000", "gmx mdrun -gpu_id 1 -ntomp 16 -s
MD_15NM_WATER.tpr -nsteps 10000", "gmx mdrun -gpu_id 1 -ntomp 16 -s
MD_15NM_WATER.tpr -nsteps 10000", "gmx mdrun -gpu_id 1 -ntomp 16 -s
MD_15NM_WATER.tpr -nsteps 10000"), condition = c("Tesla P100-SYCL",
"Tesla V100-SYCL", "Tesla P100-CUDA", "Tesla V100-CUDA", "Tesla
P100-SYCL", "Tesla V100-SYCL", "Tesla P100-CUDA", "Tesla V100-CUDA"),
value = c(75.8, 77.771, 63.297, 78.046, 34.666, 50.052, 32.07,
59.815)), class...
2009 Jul 28
0
[PATCH 2/8] nv50: fix viewport transform
...ERIZER)) {
unsigned bypass;
+ float y_translate = (float)nv50->framebuffer.height;
if (!nv50->rasterizer->pipe.bypass_vs_clip_and_viewport)
bypass = 0;
@@ -271,25 +272,33 @@ scissor_uptodate:
nv50->state.viewport_bypass = bypass;
so = so_new(12, 0);
+ so_method(so, tesla, NV50TCL_VIEW_VOLUME_CLIP_CTRL, 1);
if (!bypass) {
- so_method(so, tesla, NV50TCL_VIEWPORT_UNK1(0), 3);
+ so_data(so, 0x0000);
+ y_translate -= nv50->viewport.translate[1];
+ so_method(so, tesla, NV50TCL_VIEWPORT_TRANSLATE(0), 3);
so_data (so, fui(nv50->viewport.translate[0]))...
2010 May 31
1
[PATCH] nv50/exa: use dual-source blending for component-alpha composite
...s(+), 56 deletions(-)
diff --git a/src/nv50_accel.c b/src/nv50_accel.c
index 1218e18..db8c744 100644
--- a/src/nv50_accel.c
+++ b/src/nv50_accel.c
@@ -213,7 +213,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn)
OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
OUT_RING (chan, 0);
- BEGIN_RING_NI(chan, tesla, NV50TCL_CB_DATA(0), 16);
+ BEGIN_RING_NI(chan, tesla, NV50TCL_CB_DATA(0), 22);
OUT_RING (chan, 0x80000000);
OUT_RING (chan, 0x90000004);
OUT_RING (chan, 0x82030210);
@@ -228,36 +228,14 @@ NVAccelInitNV50TCL(ScrnInfoP...
2009 Jul 12
0
[PATCH 2/3] nv50: fix viewport transform
...;dirty & (NV50_NEW_VIEWPORT | NV50_NEW_RASTERIZER)) {
unsigned bypass;
+ struct pipe_viewport_state viewp;
if (!nv50->rasterizer->pipe.bypass_vs_clip_and_viewport)
bypass = 0;
@@ -277,25 +283,42 @@ scissor_uptodate:
so = so_new(12, 0);
if (!bypass) {
- so_method(so, tesla, NV50TCL_VIEWPORT_UNK1(0), 3);
- so_data (so, fui(nv50->viewport.translate[0]));
- so_data (so, fui(nv50->viewport.translate[1]));
- so_data (so, fui(nv50->viewport.translate[2]));
- so_method(so, tesla, NV50TCL_VIEWPORT_UNK0(0), 3);
- so_data (so, fui(nv50->viewport.scale...
2009 Jun 21
0
[PATCH] nv50: add support for two-sided lighting
...h_map = 4;
break;
default:
assert(!"unsupported GPU program type");
@@ -2389,15 +2407,12 @@ nv50_vertprog_validate(struct nv50_context *nv50)
nv50_program_validate_data(nv50, p);
nv50_program_validate_code(nv50, p);
- so = so_new(10, 0);
+ so = so_new(32, 0);
so_method(so, tesla, 0x1650, 2);
so_data (so, p->cfg.vp.attr[0]);
so_data (so, p->cfg.vp.attr[1]);
so_method(so, tesla, 0x16b8, 1);
so_data (so, p->cfg.high_result);
- so_method(so, tesla, 0x16ac, 2);
- so_data (so, p->cfg.high_result); //8);
- so_data (so, p->cfg.high_temp);
so_method(so...
2014 Feb 28
2
Tesla shader ISA question
Hello,
I've recently run into an unknown bit in Tesla shaders, and was hoping
you could shed some light on it. I believe they're related to clamping
of some sort. Here are 2 examples (from diff shaders):
a0000401 cc054780 cvt rpi f32 $r0 f32 $r2 [unknown: 00000000 00010000]
a000060d 8c014780 cvt rni s32 $r3 f32 $r3 [unknown: 00000000 0001...
2005 Aug 17
7
Need help with the rubyonrails wiki - instiki filters
...he auto formatting. Using httdp.conf produces
http://httpd.conf when filtered. Using *.so produces .so and bold text
there after.
Is there any shorthand for the user for making text appear as it should
without the linking and re-writes? Or does the admin have to change the
filters in Instiki?
Tesla
2009 Apr 08
0
[PATCH/Gallium] nv50: update nv50_clear to new interface
...uct pipe_surface *ps = NULL;
+ /* silenced 'used uninitialized' warning by setting NULL,
+ * GCC doesn't know it can't actually happen */
struct nv50_context *nv50 = nv50_context(pipe);
struct nouveau_channel *chan = nv50->screen->nvws->channel;
struct nouveau_grobj *tesla = nv50->screen->tesla;
@@ -37,21 +42,45 @@ nv50_clear(struct pipe_context *pipe, struct pipe_surface *ps,
struct pipe_scissor_state sc, s_sc = nv50->scissor;
unsigned dirty = nv50->dirty;
+ /* if 'no buffers' case is possible, change this to if/return */
+ assert(buffers &a...
2014 Apr 09
0
Tesla shader ISA question
...loat32-to-signed-int32 conversion, rounding to
the nearest even integer
* For the {float,int}-to-{float,int} operations, bit 48 indicates
whether the input is signed (1==signed), but that bit is ignored when
the source format is float (always signed). That should apply across
the entire Tesla architecture.
Where did the Tesla shader come from that you were decoding? I assume
it was produced by the NVIDIA proprietary driver?
If I had to guess, I'd speculate that the shader compiler in the NVIDIA
proprietary driver used an uninitialized variable, and then overwrote the
bits that...
2009 Sep 12
0
[PATCH 10/13] nv50: proper linkage between VP and FP
...(p->info.uses_kill)
- p->cfg.fp.regs[2] |= 0x00100000;
+ p->cfg.regs[2] |= 0x00100000;
break;
}
@@ -2606,8 +2621,8 @@ nv50_vertprog_validate(struct nv50_context *nv50)
so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, tesla, NV50TCL_VP_ATTR_EN_0, 2);
- so_data (so, p->cfg.vp.attr[0]);
- so_data (so, p->cfg.vp.attr[1]);
+ so_data (so, p->cfg.attr[0]);
+ so_data (so, p->cfg.attr[1]);
so_method(so, tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1);
so_data (so, p->cfg.high_result);
so_method(so, tesla, NV5...
2014 Nov 01
1
Tesla branch limits?
Hello,
We're seeing a very odd issue on many (all?) tesla chips (G8x, G9x,
G200, GT21x) related to looping. People will have loops in glsl like
for (i = 0; i < 200; i++) {
...
if (cond) break;
}
And it seems like if it breaks out of the loop early, all's well, but
eventually it peeters out (I haven't figured out exactly when though).
See...
2018 Mar 07
1
TLD instruction usage in non-linked sampler mode
Hi Andy,
Thanks for checking! I do see an issue on Tesla as well (at least G92,
and I believe someone else reported on a GT215 or GT218). However I
haven't confirmed that it's the identical issue to what I see on Fermi
with quite as much certainty as what I've checked on a GF108. (For the
G92, the texture buffer object test fails in the same...
2017 Aug 11
4
[PATCH] drm/nouveau: Document nouveau support for Tegra in DRIVER_DESC
...35e..fbe42ec0a5f1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -5,7 +5,7 @@
#define DRIVER_EMAIL "nouveau at lists.freedesktop.org"
#define DRIVER_NAME "nouveau"
-#define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla"
+#define DRIVER_DESC "nVidia Riva/TNT/GeForce/Quadro/Tesla/Tegra"
#define DRIVER_DATE "20120801"
#define DRIVER_MAJOR 1
--
2.11.0
2009 May 08
0
[PATCH] gallium/nv50: fix multi-texturing
...ontext *
diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index 223c8a3..e7e1521 100644
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -136,8 +136,12 @@ nv50_tex_validate(struct nv50_context *nv50)
struct nouveau_grobj *tesla = nv50->screen->tesla;
struct nouveau_stateobj *so;
int unit;
+ unsigned push_nr;
- so = so_new(nv50->miptree_nr * 8 + 3, nv50->miptree_nr * 2);
+ push_nr = MAX2(nv50->miptree_nr, nv50->texbind_nr) * 2;
+ push_nr += nv50->miptree_nr * 8 + 3;
+
+ so = so_new(push_nr, nv50-&...
2010 Feb 05
1
[PATCH] nv50/accel: Fix mangled A8+A8 shader.
...ns(+), 2 deletions(-)
diff --git a/src/nv50_accel.c b/src/nv50_accel.c
index 5fa539c..1218e18 100644
--- a/src/nv50_accel.c
+++ b/src/nv50_accel.c
@@ -291,7 +291,7 @@ NVAccelInitNV50TCL(ScrnInfoPtr pScrn)
OUT_RING (chan, (0 << NV50TCL_CB_DEF_SET_BUFFER_SHIFT) | 0x4000);
BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
OUT_RING (chan, 0);
- BEGIN_RING_NI(chan, tesla, NV50TCL_CB_DATA(0), 15);
+ BEGIN_RING_NI(chan, tesla, NV50TCL_CB_DATA(0), 16);
OUT_RING (chan, 0x80000000);
OUT_RING (chan, 0x90000004);
OUT_RING (chan, 0x82030208);
@@ -302,7 +302,8 @@ NVAccelInitNV50TCL(ScrnInfoPtr...
2013 Nov 20
0
H.264 engine differences between fermi and tesla cards
Hello,
I hope this is an appropriate style of request for this forum. I added
code to support video decoding on the tesla cards that have a
similar-style video decoding engine to fermi cards (i.e. G98, GT21x,
the IGP's -- the falcon-controlled decoding engines, rather than the
xtensa-controlled ones), by using pretty much the same logic that we
had for the fermi cards. This worked great for MPEG-2 and VC-1.
Howeve...