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...with samba. Is it supposed to be possible to store it with samba and a ldap backend, and if yes, where should it be stored? Which attribute and how to modify it? That my last problem before to be able to perform a full migration to samba. Any advise, help or docs could be great! Regards, Arnault Teissier -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: This is a digitally signed message part Url : http://lists.samba.org/archive/samba/attachments/20050222/6e43f41d/attachment.bin

> Calling 0 is undefined behavior; the optimizer is within its rights to > remove this. Why do you want to call 0? For example, on embedded platforms you call 0 to do a soft reset. > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

> 2. The backend (llc) converts that to Dwarf (or something else as > desired by that back-end). > How advanced is LLVM Dwarf generation compared to GCC ?

On Tue, Jun 30, 2009 at 6:11 AM, Sylvere Teissier<st at invia.fr> wrote: >> 2. The backend (llc) converts that to Dwarf (or something else as >> desired by that back-end). >> > How advanced is LLVM Dwarf generation compared to GCC ? Devang can probably give a better answer, but my understanding is: 1. At -O0, the quali...

On Jun 4, 2010, at 3:05 AM, Sylvere Teissier wrote: > > In my target the CALL instruction change the link Register %LR > In the target InstrInfo.td I have "Defs=[LR]" on the CALL instruction > definition to handle that. So your CALL instructions are clobbering your callee-saved registers, eh? ;-) > It works well wi...

I think there is a latency problem with the mail server. That create answer echo :D > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev

> How each target handles the code generation > differences will be the interesting part. Why not use a target specific calling convention? An interrupt is like a normal function call, it only has a different calling convention.

Hi, this is a small patch of ARM Instructions description because "-verify-machineinstrs" complains about that. This doesn't break the tests on my machine. Regards -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: patch_barrier URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090929/84aca914/attachment.ksh>

...soft rss 150000000 # * hard as 150000000 * soft as 150000000 # ... # uname -r 2.6.18-238.9.1.el5.centos.plus Any idea ? Thanks -- Christophe Caron Station Biologique - Service Informatique et G?nomique christophe.caron at sb-roscoff.fr Place Georges Teissier - 29680 Roscoff t?l: +33 (0)2 98 29 25 43 / t?l: +33 (0)6 07 83 54 77 fax: +33 (0)2 98 29 23 24 Analysis and Bioinformatics for Marine Sciences Platform http://abims.sb-roscoff.fr/ -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: applicatio...

isBarrier is not defined in BX_RET and tBX_RET instructions and the Machine Instructions Verifier (-verify-machineinstrs) give errors about that. Is it normal that isBarrier is not defined on these instructions ?

Hi, With the MSP430 target I have live-in/live-out problems pointed out by Machine Instruction Verifier with the attached test-case compiled with: clang-cc -triple=msp430-unknown-unknown test-live.c -S -o - -O1 -verify-machineinstrs -debug For example: %R15W is killed in MBB#0: CMP16rr %R14W<kill>, %R15W<kill>, %SRW<imp-def> But %R15 as live-in in MMB#1: if.else: 0xa244c20,