search for: tegra_powergate_3d

...be9c0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -51,10 +51,12 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev) reset_control_assert(tdev->rst); udelay(10); - ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); - if (ret) - goto err_clamp; - udelay(10); + if (!tdev->pdev->dev.pm_domain) { + ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); + if (ret) + goto err_clamp; + udelay(10); + } reset_control_deassert(tdev->rst); udelay(10); -- 2.13.0

.../drm/nouveau/nvkm/engine/device/tegra.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c > @@ -51,10 +51,12 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev) > reset_control_assert(tdev->rst); > udelay(10); > > - ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); > - if (ret) > - goto err_clamp; > - udelay(10); > + if (!tdev->pdev->dev.pm_domain) { > + ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); > + if (ret) > + goto err_clamp; > + udelay(10); > + } > > reset_control_deassert(tdev->rst); &...

...a/pmc.c > @@ -225,17 +225,6 @@ int tegra_powergate_remove_clamping(int id) > return -EINVAL; > > /* > - * The Tegra124 GPU has a separate register (with different semantics) > - * to remove clamps. > - */ > - if (tegra_get_chip_id() == TEGRA124) { > - if (id == TEGRA_POWERGATE_3D) { > - tegra_pmc_writel(0, GPU_RG_CNTRL); > - return 0; > - } > - } > - > - /* > * Tegra 2 has a bug where PCIE and VDE clamping masks are > * swapped relatively to the partition ids > */ > @@ -253,6 +242,29 @@ int tegra_powergate_remove_clamping(int id)...

...d) > >> return -EINVAL; > >> > >> /* > >> - * The Tegra124 GPU has a separate register (with different semantics) > >> - * to remove clamps. > >> - */ > >> - if (tegra_get_chip_id() == TEGRA124) { > >> - if (id == TEGRA_POWERGATE_3D) { > >> - tegra_pmc_writel(0, GPU_RG_CNTRL); > >> - return 0; > >> - } > >> - } > >> - > >> - /* > >> * Tegra 2 has a bug where PCIE and VDE clamping masks are > >> * swapped relatively to the partition ids > &g...

...rivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -225,17 +225,6 @@ int tegra_powergate_remove_clamping(int id) return -EINVAL; /* - * The Tegra124 GPU has a separate register (with different semantics) - * to remove clamps. - */ - if (tegra_get_chip_id() == TEGRA124) { - if (id == TEGRA_POWERGATE_3D) { - tegra_pmc_writel(0, GPU_RG_CNTRL); - return 0; - } - } - - /* * Tegra 2 has a bug where PCIE and VDE clamping masks are * swapped relatively to the partition ids */ @@ -253,6 +242,29 @@ int tegra_powergate_remove_clamping(int id) EXPORT_SYMBOL(tegra_powergate_remove_clamping);...

...nt tegra_powergate_remove_clamping(int id) >> return -EINVAL; >> >> /* >> - * The Tegra124 GPU has a separate register (with different semantics) >> - * to remove clamps. >> - */ >> - if (tegra_get_chip_id() == TEGRA124) { >> - if (id == TEGRA_POWERGATE_3D) { >> - tegra_pmc_writel(0, GPU_RG_CNTRL); >> - return 0; >> - } >> - } >> - >> - /* >> * Tegra 2 has a bug where PCIE and VDE clamping masks are >> * swapped relatively to the partition ids >> */ >> @@ -253,6 +242,29 @@ i...

...turn -EINVAL; >>>> >>>> /* >>>> - * The Tegra124 GPU has a separate register (with different semantics) >>>> - * to remove clamps. >>>> - */ >>>> - if (tegra_get_chip_id() == TEGRA124) { >>>> - if (id == TEGRA_POWERGATE_3D) { >>>> - tegra_pmc_writel(0, GPU_RG_CNTRL); >>>> - return 0; >>>> - } >>>> - } >>>> - >>>> - /* >>>> * Tegra 2 has a bug where PCIE and VDE clamping masks are >>>> * swapped relatively to...

Hi, This series includes some pieces of fixes to complete the GK20A power on/off sequences and add the suspend/resume support. The patches 1/11 - 4/11 are based on the linux-next-20141219. The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's tree (http://cgit.freedesktop.org/~darktama/nouveau). Thanks, Vince Vince Hsu (4): (linux-next-20141219) ARM:

...+ err = clk_prepare_enable(gpu->clk); + if (err) + goto err_clk; + err = clk_prepare_enable(gpu->clk_pwr); + if (err) + goto err_clk_pwr; + clk_set_rate(gpu->clk_pwr, 204000000); + udelay(10); + + reset_control_assert(gpu->rst); + udelay(10); + + err = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); + if (err) + goto err_clamp; + udelay(10); + + reset_control_deassert(gpu->rst); + udelay(10); + + return 0; + +err_clamp: + clk_disable_unprepare(gpu->clk_pwr); +err_clk_pwr: + clk_disable_unprepare(gpu->clk); +err_clk: + regulator_disable(gpu->vdd); +err_power: + return err; +} + +...

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. This version is mostly identical to v2 but fixes an important issue: the drvdata must be set to the drm_device for sysfs to work, so the platform device structure now includes the

This series adds support for probing platform devices on Nouveau, as well as the DT bindings for GK20A. It doesn't enable the GPU yet on Tegra boards since a few extra things need to be supported before that. Thanks to the input received for v1, this version is more self-contained and shares less stuff between nouveau_drm and nouveau_platform. The major change is that nouveau_platform is now

...t; + goto err_clk; > + err = clk_prepare_enable(gpu->clk_pwr); > + if (err) > + goto err_clk_pwr; > + clk_set_rate(gpu->clk_pwr, 204000000); > + udelay(10); > + > + reset_control_assert(gpu->rst); > + udelay(10); > + > + err = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D); > + if (err) > + goto err_clamp; > + udelay(10); > + > + reset_control_deassert(gpu->rst); > + udelay(10); > + > + return 0; > + > +err_clamp: > + clk_disable_unprepare(gpu->clk_pwr); > +err_clk_pwr: > + clk_disable_unprepare(gpu->clk); > +err_c...

This patch series is the final (?) step towards the initial support of GK20A, allowing it to be probed and used (currently at a very slow speed, and for offscreen rendering only) on the Jetson TK1 and Venice 2 boards. The main piece if the first patch which adds platform devices probing support to Nouveau. There are probably lots of things that need to be discussed about it, e.g.: * The way the

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

From: Thierry Reding <treding at nvidia.com> Hi, the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why exactly is not clear, but there are slight differences between the SKUs that were tested. It turns out that the biggest issue is that on some devices (e.g. the one that I have), pulsing the GPU reset twice as is done in the current code (once as part of the power-ungate