Displaying 5 results from an estimated 5 matches for "tegra124_stable_hotreset_check".
2014 Dec 23
0
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...29},
+ {TEGRA_SWGROUP_SDMMC2A, 0x200, 0x200, 30},
+ {TEGRA_SWGROUP_SDMMC3A, 0x200, 0x200, 31},
+ {TEGRA_SWGROUP_SDMMC4A, 0x970, 0x974, 0},
+ {TEGRA_SWGROUP_ISP2B, 0x970, 0x974, 1},
+ {TEGRA_SWGROUP_GPU, 0x970, 0x974, 2},
+};
+
#ifdef CONFIG_ARCH_TEGRA_124_SOC
+
+static bool tegra124_stable_hotreset_check(struct tegra_mc *mc,
+ u32 reg, u32 *stat)
+{
+ int i;
+ u32 cur_stat;
+ u32 prv_stat;
+
+ prv_stat = mc_readl(mc, reg);
+ for (i = 0; i < 5; i++) {
+ cur_stat = mc_readl(mc, reg);
+ if (cur_stat != prv_stat)
+ return false;
+ }
+ *stat = cur_stat;
+ return true;
+}
+
+static int tegra124_m...
2015 Jan 06
2
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...at I have says that the status register for these is
0x204.
> + {TEGRA_SWGROUP_SDMMC4A, 0x970, 0x974, 0},
> + {TEGRA_SWGROUP_ISP2B, 0x970, 0x974, 1},
> + {TEGRA_SWGROUP_GPU, 0x970, 0x974, 2},
> +};
> +
> #ifdef CONFIG_ARCH_TEGRA_124_SOC
> +
> +static bool tegra124_stable_hotreset_check(struct tegra_mc *mc,
> + u32 reg, u32 *stat)
> +{
> + int i;
> + u32 cur_stat;
> + u32 prv_stat;
> +
> + prv_stat = mc_readl(mc, reg);
> + for (i = 0; i < 5; i++) {
> + cur_stat = mc_readl(mc, reg);
> + if (cur_stat != prv_stat)
> + return false;
> + }
W...
2015 Jan 06
1
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...EGRA_SWGROUP_SDMMC4A, 0x970, 0x974, 0},
> > > + {TEGRA_SWGROUP_ISP2B, 0x970, 0x974, 1},
> > > + {TEGRA_SWGROUP_GPU, 0x970, 0x974, 2},
> > > +};
> > > +
> > > #ifdef CONFIG_ARCH_TEGRA_124_SOC
> > > +
> > > +static bool tegra124_stable_hotreset_check(struct tegra_mc *mc,
> > > + u32 reg, u32 *stat)
> > > +{
> > > + int i;
> > > + u32 cur_stat;
> > > + u32 prv_stat;
> > > +
> > > + prv_stat = mc_readl(mc, reg);
> > > + for (i = 0; i < 5; i++) {
> > > + cur_stat...
2015 Jan 06
0
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...is. Will fix.
>
> > + {TEGRA_SWGROUP_SDMMC4A, 0x970, 0x974, 0},
> > + {TEGRA_SWGROUP_ISP2B, 0x970, 0x974, 1},
> > + {TEGRA_SWGROUP_GPU, 0x970, 0x974, 2},
> > +};
> > +
> > #ifdef CONFIG_ARCH_TEGRA_124_SOC
> > +
> > +static bool tegra124_stable_hotreset_check(struct tegra_mc *mc,
> > + u32 reg, u32 *stat)
> > +{
> > + int i;
> > + u32 cur_stat;
> > + u32 prv_stat;
> > +
> > + prv_stat = mc_readl(mc, reg);
> > + for (i = 0; i < 5; i++) {
> > + cur_stat = mc_readl(mc, reg);
> > + if (cur_st...
2014 Dec 23
18
[PATCH 0/11] Add suspend/resume support for GK20A
Hi,
This series includes some pieces of fixes to complete the GK20A power
on/off sequences and add the suspend/resume support.
The patches 1/11 - 4/11 are based on the linux-next-20141219.
The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's
tree (http://cgit.freedesktop.org/~darktama/nouveau).
Thanks,
Vince
Vince Hsu (4): (linux-next-20141219)
ARM: