search for: tegra124_mc_flush

Displaying 5 results from an estimated 5 matches for "tegra124_mc_flush".

2014 Dec 23
0
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...eset_check(struct tegra_mc *mc, + u32 reg, u32 *stat) +{ + int i; + u32 cur_stat; + u32 prv_stat; + + prv_stat = mc_readl(mc, reg); + for (i = 0; i < 5; i++) { + cur_stat = mc_readl(mc, reg); + if (cur_stat != prv_stat) + return false; + } + *stat = cur_stat; + return true; +} + +static int tegra124_mc_flush(struct tegra_mc *mc, + const struct tegra_mc_hr *hr_client, bool enable) +{ + u32 val; + + if (!mc || !hr_client) + return -EINVAL; + + val = mc_readl(mc, hr_client->ctrl); + if (enable) + val |= BIT(hr_client->bit); + else + val &= ~BIT(hr_client->bit); + mc_writel(mc, val, hr_cli...
2015 Jan 06
2
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...lse; > + } Why this loop? The function is already called in a polling loop below. Also why compare to the previous value of the register? Isn't the only thing we're interested in the value of the specific bit? > + *stat = cur_stat; > + return true; > +} > + > +static int tegra124_mc_flush(struct tegra_mc *mc, > + const struct tegra_mc_hr *hr_client, bool enable) > +{ > + u32 val; > + > + if (!mc || !hr_client) > + return -EINVAL; > + > + val = mc_readl(mc, hr_client->ctrl); > + if (enable) > + val |= BIT(hr_client->bit); > + else > + val...
2015 Jan 06
1
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...if we program > the ctrl reg and then read the status reg in a short window. This function > is to make sure we have a stable status. This warrants a comment, then. > > > + *stat = cur_stat; > > > + return true; > > > +} > > > + > > > +static int tegra124_mc_flush(struct tegra_mc *mc, > > > + const struct tegra_mc_hr *hr_client, bool enable) > > > +{ > > > + u32 val; > > > + > > > + if (!mc || !hr_client) > > > + return -EINVAL; > > > + > > > + val = mc_readl(mc, hr_client->ctrl); &...
2015 Jan 06
0
[PATCH 3/11] memory: tegra: add flush operation for Tegra124 memory clients
...recall it's due to a HW bug that there might be a gitch if we program the ctrl reg and then read the status reg in a short window. This function is to make sure we have a stable status. > > > + *stat = cur_stat; > > + return true; > > +} > > + > > +static int tegra124_mc_flush(struct tegra_mc *mc, > > + const struct tegra_mc_hr *hr_client, bool enable) > > +{ > > + u32 val; > > + > > + if (!mc || !hr_client) > > + return -EINVAL; > > + > > + val = mc_readl(mc, hr_client->ctrl); > > + if (enable) > > + val...
2014 Dec 23
18
[PATCH 0/11] Add suspend/resume support for GK20A
Hi, This series includes some pieces of fixes to complete the GK20A power on/off sequences and add the suspend/resume support. The patches 1/11 - 4/11 are based on the linux-next-20141219. The patches 5/11 - 11/11 are based on the branch "linux-3.19" of Ben Skeggs's tree (http://cgit.freedesktop.org/~darktama/nouveau). Thanks, Vince Vince Hsu (4): (linux-next-20141219) ARM: