search for: technicalresourc

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2004 Aug 06
5
SIMD interest
Greetings, <p>my apologies for putting this trash in the mailing list but the topic about SSE run-time option interested me pretty much. Looks like some people is really experienced on the topic. I would really appreciate if somebody could point me to good resources about SSE and Altivec (not necessarly on the net, I'm ready to invest some money if necessary). I already have intel
2004 Aug 06
0
SIMD interest
...r BIOS needs to support it as well. We have on machine in our test labs that is exactly this case. Atholon 2400+ XP with Win XP and no support for xmm / SSE FP. AMD has a great sample program for determining which CPU flags are supported. You can find it at: http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_871_2364,00.html Aron Rosenberg SightSpeed Inc. <p>At 08:36 PM 1/17/2004 +0100, you wrote: >Greetings, > > >my apologies for putting this trash in the mailing list but the topic >about SSE run-time option interested me pretty much. >Looks like some people is r...
2005 May 27
0
SVM/Pacifica Spec posted
Ths SVM/Pacifica spec is now posted. It can be found on the AMD64 Architecture page: http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_704 4,00.html The PDF file link is at: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/ 33047.pdf Elsie Wahlig _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
2007 Jun 13
15
page table question!
I want to know any difference between writing, reading and shadow page table (for example performance). I am thankful for any help or resource for that. -- Best Regards Mohamad Taghi Mir Mohamad Rezaie Iran University of Science and Technology Department of Computer Science & Engineering System Software Group _______________________________________________ Xen-devel mailing list