search for: tcvts

...ion pointer to ecx before the tailcall node. So where i approximately had this before (assuming that RetNode.getOp (1) is not a TargetGlobalAddress or the like) SDOperand OpsTailCall [] = {AdjStackChain, RetNode.getOperand(1), RetNode.getOperand(2)}; RetNode = DCI.DAG.getNode(X86ISD::TAILCALL, TCVTs, OpsTailCall,3); would then be replaced by Chain = DAG.getCopyToReg(AdjStackChain, X86::ECX, RetNode.getOperand (1)); SDOperand OpsTailCall [] = {Chain,DAG.getRegister(X86::ECX, getPointerTy())), RetNode.getOperand(2)}; RetNode = DCI.DAG.getNode(X86ISD::TAILCALL, TCVTs, OpsTailCall, 3); the d...

Hello, Arnold. > Is there a way to indicate that the register the tail call > instruction uses as destination needs to be valid after the callee > saved registers have been restored? (some X86InstrInfo.td foo magic > maybe ?) It's wrong way to do the things. Because in this case you either violate the ABI for callee, or you're restricted to do tail call lowering only for

...tailcall node. > > So where i approximately had this before (assuming that RetNode.getOp > (1) is not a TargetGlobalAddress or the like) > > SDOperand OpsTailCall [] = {AdjStackChain, RetNode.getOperand(1), > RetNode.getOperand(2)}; > RetNode = DCI.DAG.getNode(X86ISD::TAILCALL, TCVTs, OpsTailCall,3); > > would then be replaced by > > Chain = DAG.getCopyToReg(AdjStackChain, X86::ECX, RetNode.getOperand > (1)); > SDOperand OpsTailCall [] = {Chain,DAG.getRegister(X86::ECX, > getPointerTy())), RetNode.getOperand(2)}; > RetNode = DCI.DAG.getNode(X86ISD::TAILC...

Hello, Arnold. > with the sentence i tried to express the question whether there is a > way to persuade the code generator to use another register to load (or > move) the function pointer to (right before the callee saved register > restore) but thinking a little further that's nonsense. Why don't define some special op for callee address and custom lower it? I really