Displaying 3 results from an estimated 3 matches for "tcecc".
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cecc
2010 Nov 10
0
[LLVMdev] TTA-Based Codesign Environment (TCE) v1.3 released
...ne simulation models for the function units.
- Improved the scheduling for unconnected machines through temporary
register copies based on the maze algorithm for ASIC place & route.
Not restricted to maximum of two copies anymore.
- Basic support for debugging info when compiled with 'tcecc -g'.
The source code line numbers are displayed as comments in 'tcedisasm'
output and ttasim's disassembly.
- Platform Integration support is improved. New integrator components
include AvalonIntegrator which can be used to integrate TTA to a
Altera SOPC Builder componen...
2012 Apr 11
0
[LLVMdev] float16/half float support situation? (and a problem)
...not select: 0x2f566b0: i32 = fp32_to_fp16 0x2f66bb0 [ID=876]
So I created an instruction pattern which matches this fp32_to_fp16
def CFHrf : InstTCE<(outs R32IRegs:$op2), (ins R32FPRegs:$op1), "",
[(set R32IRegs:$op2, (fp32_to_fp16 R32FPRegs:$op1))]>;
But then I got error
/tmp/tcecc-dKBdca/GenInstrInfo.td:30:91: error: Variable not defined:
'fp32_to_fp16'
2011 Apr 11
0
[LLVMdev] TTA-Based Co-design Environment (TCE) v1.4 released
...ive than the bypass connections.
- Added --pareto_set switch to the explorer for printing pareto efficient
configurations. Currently supports the connectivity and cycle count as
the quality metrics.
- proge: IP-XACT support updated to version 1.5
- Added switch --print-resource-constraints to tcecc to assist in
deciding which resources to add to the machine to improve the
schedule. Dumps DDGs to dot files along with dependence and
resource constraint analysis data.
Code generator improvements
---------------------------
- Passes the first function parameter in register instead of st...