search for: tc_return

...(like setBytesToPopOnReturn() , a setIsRealTailCall()) in the targetlowering()) *else emit regular function call with same calling conventions 3.)lower of the return: *if we are dealing with a realtailcall (getIsRealTailCall) look for REALTAILCALL use its operands to emit a TC_RETURN node holding stacksize, tailcallee the tc_return node would again be a pseudoop *else lower normal return When generating the epilog the two operands of the the tc_return machine instruction are used to emit code that adjust the stackpointer and jumps to the tailcallee (either label...

...at it has both TCRETURNri64 > and RET in one BB? Yes, that is wrong. The reason emitEpilogue isn't lowering the TCRETURN is that it doesn't see it, it only sees the RET. The real problem will be where that RET is generated. Normally that's LowerCall (where it is spelled TC_RETURN), but reading through it I can't see any way to generate both a TC_RETURN and a RET.

...of arguments is pretty similar to std call. The LowerRET function checks for the IsLastCallTailCall field and if its true does the following otherwise it does its usual duty. It looks for the TAILCALL node and uses the operand holding the callee and the stack adjustment to build and return a TC_RETURN node with preceeding operands as its own operands. The TAILCALL node is converted to a noop machine instruction. Ditto the TC_RETURN node. (it declares the iscall=1, isbarrier=1, isret=1) The machine instructions needed to adjust the stack and jump to the callee is added in the epilogue gen...

...tty similar to std call. > > The LowerRET function checks for the IsLastCallTailCall field and if > its true does the following otherwise it does its usual duty. > It looks for the TAILCALL node and uses the operand holding the > callee and the stack adjustment to build and return a TC_RETURN node > with preceeding operands as its own operands. > > The TAILCALL node is converted to a noop machine instruction. > Ditto the TC_RETURN node. (it declares the iscall=1, isbarrier=1, > isret=1) > > The machine instructions needed to adjust the stack and jump to the > cal...

...that it has both TCRETURNri64 and RET in one BB? > > Yes, that is wrong. The reason emitEpilogue isn't lowering the TCRETURN is that it doesn't see it, it only sees the RET. The real problem will be where that RET is generated. Normally that's LowerCall (where it is spelled TC_RETURN), but reading through it I can't see any way to generate both a TC_RETURN and a RET. > Bug somewhere for sure, but without a testcase or way to reproduce it then it'd be hard to find. Could have a machine verify pass that makes sure each MBB only had one exit instruction. -eric

Hello, Arnold. Only quick comments, I'll try to make a full review a little bit later. > 0.)a fast calling convention (maybe use the current > CallingConv::Fast, or create a CallingConv::TailCall) > 1.) lowering of formal arguments > like for example x86_LowerCCCArguments in stdcall mode > we need to make sure that later mentioned CALL_CLOBBERED_REG is >

...code for X86. It mostly does what i have described in preceeding emails: There is new code for lowering fastcc calls: LowerX86_32FastCCCallTo LowerX86_32FastCCArguments There is some code checking whether a TAIL CALL really is eligible for tail call optimization. I modified: LowerRET to create a TC_RETURN node. (used for adjusting stackpointer and jumping to function in epilogue, similar to EH_RETURN) There is a new calling convention: CC_X86_32_TailCall which is ~ CC_X86_32_C minus ECX. There are some modifications in X86InstrInfo.td There are new X86 DAG nodes: TRUETAILCALL TC_RETURN There i...

...n one BB? >> >> Yes, that is wrong. The reason emitEpilogue isn't lowering the >> TCRETURN is that it doesn't see it, it only sees the RET. The >> real problem will be where that RET is generated. Normally that's >> LowerCall (where it is spelled TC_RETURN), but reading through it I >> can't see any way to generate both a TC_RETURN and a RET. >> > Bug somewhere for sure, but without a testcase or way to reproduce > it then it'd be hard to find. Yes, Yuri's going to have to debug it, or provide a way for others to...

...: $src1, i32imm:$src2), + "sub{l}\t{$src2, $dst|$dst, $src2}", + []>; + +//let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in +//def TCRETURNmi : I<0, Pseudo, (outs), (ins i32mem:$dst, i32imm: $offset), +// "#TC_RETURN $dst $offset", +// []>; + Why are these needed? They don't look any different from normal add and subtraction instructions. Why not just use ADJCALLSTACKDOWN and ADJCALLSTACKUP? 6. + } else if (RetOpcode == X86::TCRETURNdi) { + // a tailcall adjust the stack ....

On 08/26/2010 13:17, Dale Johannesen wrote: >>> Insn before the error: TCRETURNri64 %RAX<kill>, 0, %RDI<kill>, >>> %RAX<imp-def,dead>, %RDI<imp-def,dead>, %RSP<imp-use>, ... >> >> Odd. I thought TCReturn was being lowered. At any rate can you file >> a bug with the .ll file that causes this? > > It should be getting

...to implement atomic operations. STCX, - /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This - /// is used to implement atomic operations. - CMP_UNRESERVE, - /// TAILCALL - Indicates a tail call should be taken. TAILCALL, /// TC_RETURN - A tail call return. @@ -325,10 +326,6 @@ SelectionDAG &DAG) const; private: - /// PPCAtomicLabelIndex - Keep track the number of PPC atomic labels. - /// - unsigned PPCAtomicLabelIndex; - SDOperand getFramePointerFrameInde...

On Aug 26, 2010, at 12:59 PMPDT, Eric Christopher wrote: > On Aug 26, 2010, at 12:25 PM, Yuri wrote: >> On 08/26/2010 11:53, Eric Christopher wrote: >>> Could you get it to print out the instruction when it happens? >>> (just change the line above the error message to print it out to >>> errs()). >>> >>> It basically means that a pseudo

PPCTargetLowering::EmitInstrWithCustomInserter has a reference to the current MachineFunction for other purposes. Can you use MachineFunction::getRegInfo instead? Dan On Jul 8, 2008, at 1:56 PM, Gary Benson wrote: > Would it be acceptable to change MachineInstr::getRegInfo from private > to public so I can use it from > PPCTargetLowering::EmitInstrWithCustomInserter? > >

...to implement atomic operations. STCX, - /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This - /// is used to implement atomic operations. - CMP_UNRESERVE, - /// TAILCALL - Indicates a tail call should be taken. TAILCALL, /// TC_RETURN - A tail call return. @@ -325,10 +326,6 @@ SelectionDAG &DAG) const; private: - /// PPCAtomicLabelIndex - Keep track the number of PPC atomic labels. - /// - unsigned PPCAtomicLabelIndex; - SDOperand getFramePointerFrameInde...

Hi Gary, This does not patch cleanly for me (PPCISelLowering.cpp). Can you prepare a updated patch? Thanks, Evan On Jul 10, 2008, at 11:45 AM, Gary Benson wrote: > Cool, that worked. New patch attached... > > Cheers, > Gary > > Evan Cheng wrote: >> Just cast both values to const TargetRegisterClass*. >> >> Evan >> >> On Jul 10, 2008, at 7:36

Just cast both values to const TargetRegisterClass*. Evan On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > Evan Cheng wrote: >> How about? >> >> const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : >> &PPC:G8RCRegClass; >> unsigned TmpReg = RegInfo.createVirtualRegister(RC); > > I tried something like that yesterday: > > const

Evan Cheng wrote: > How about? > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > &PPC:G8RCRegClass; > unsigned TmpReg = RegInfo.createVirtualRegister(RC); I tried something like that yesterday: const TargetRegisterClass *RC = is64bit ? &PPC::GPRCRegClass : &PPC::G8RCRegClass; but I kept getting this error no matter how I arranged it:

You need to insert new basic blocks and update CFG to accomplish this. There is a hackish way to do this right now. Add a pseudo instruction to represent this operation and mark it usesCustomDAGSchedInserter. This means the intrinsic is mapped to a single (pseudo) node. But it is then expanded into instructions that can span multiple basic blocks. See

...to implement atomic operations. STCX, - /// CMP_UNRESERVE = Test for equality and "unreserve" if not true. This - /// is used to implement atomic operations. - CMP_UNRESERVE, - /// TAILCALL - Indicates a tail call should be taken. TAILCALL, /// TC_RETURN - A tail call return. @@ -325,10 +326,6 @@ SelectionDAG &DAG) const; private: - /// PPCAtomicLabelIndex - Keep track the number of PPC atomic labels. - /// - unsigned PPCAtomicLabelIndex; - SDOperand getFramePointerFrameInde...

Would it be acceptable to change MachineInstr::getRegInfo from private to public so I can use it from PPCTargetLowering::EmitInstrWithCustomInserter? Cheers, Gary Evan Cheng wrote: > Look for createVirtualRegister. These are examples in > PPCISelLowering.cpp. > > Evan > On Jul 8, 2008, at 8:24 AM, Gary Benson wrote: > > > Hi Evan, > > > > Evan Cheng wrote: