Displaying 3 results from an estimated 3 matches for "tarnsfer".
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tansfer
2006 Oct 10
1
[LLVMdev] tblgen multiclasses
...utFlag of another instruction?
> 2) As a hack when a machine state is not made explicit. For example,
> in the ARM backend I haven't declared the "FP status" and the
> "status"
> registers. So the FMSTAT instruction needs a flag.
OK. Their usage as a mean to tarnsfer a status directly is more clear
now. The insn with incoming flag basically reuses the outflag of
another insn. If I understand correctly, any intruction that can change
status (usually a status register, or are there any other examples???)
should/can produce an OutFlag. And any instruction that ca...
2006 Oct 10
0
[LLVMdev] tblgen multiclasses
> Basically, flag operands are a hack used to handle resources that are not
> accurately modeled in the scheduler (e.g. condition codes, explicit
> register assignments, etc). The basic idea of the flag operand is that
> they require the scheduler to keep the "flagged" nodes stuck together in
> the output machine instructions.
>From an user point of view, flags have
2006 Oct 09
2
[LLVMdev] tblgen multiclasses
On Mon, 9 Oct 2006, Roman Levenstein wrote:
> But your previous explanations were so good that I implemented in my
> backend last week almost the same that you've done now in the
> X86InstrSSE.td. I even introduced isCommutable parameter to indicate
> this property, just as you did. So, by now integer arithmetic and
> general purpose instructions are implemented. I'm working