Displaying 4 results from an estimated 4 matches for "targetx".
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2010 Aug 09
2
TRUE/FALSE
Here is my code
# determine the DDOA measurements
for(e in 1:numSensors)
{
for(f in 1:numSensors)
{
if((combos[e,f]==1)
{
# true distance between each sensor and the target
truedistance[e]<-sqrt((targetX-sensorX[e])^2+(targetY-sensorY[e])^2)
# add an error that has a N(0, sigma^2) distribution
truedistance[e]<-(truedistance[e]+rnorm(1, 0, sigma))
}
#truedistance[1] <- (truedistance[1]+50)
#determine DDOA measurements (reference sensor is sensor #1 here)
index&l...
2006 Nov 20
0
[LLVMdev] FP emulation (continued)
On Fri, 17 Nov 2006, Roman Levenstein wrote:
> I still have some questions about FP emulation for my embedded target.
> To recap a bit:
> My target only has integer registers and no hardware support for FP. FP
> is supported only via emulation. Only f64 is supported. All FP
> operations should be implemented to use i32 registers.
ok
> allocation. But anyway, I have an almost
2006 Nov 17
2
[LLVMdev] FP emulation (continued)
Hi,
I still have some questions about FP emulation for my embedded target.
To recap a bit:
My target only has integer registers and no hardware support for FP. FP
is supported only via emulation. Only f64 is supported. All FP
operations should be implemented to use i32 registers.
Based on the fruitful discussions on this list I was already able to
implement mapping of the FP operations to
2006 Nov 20
3
[LLVMdev] FP emulation (continued)
...stomDAGSchedInserter marked MI and if yes call a target-specific
expander for it?
2) Introduce a fake register allocation pass and make it require an
f64toi32 pass as a pre-requisite. And basically call an existing
register allocator like in this code?
namespace {
static RegisterRegAlloc
TargetXRegAlloc("targetx", " targetx register allocator",
createTargetXRegisterAllocator);
struct VISIBILITY_HIDDEN RA : public MachineFunctionPass {
private:
MachineFunctionPass *RealRegAlloc;
public:
RA()
{
// Instantiate a real allo...