search for: targettransforminfo

Displaying 20 results from an estimated 234 matches for "targettransforminfo".

2017 Dec 14
2
[RFC] Add TargetTransformInfo::isAllocaPtrValueNonZero and let ValueTracking depend on TargetTransformInfo
...is incorrect for certain targets. For example, amdgcn---amdgiz target has alloca in address space 5, and its alloca always has non-zero value. This assumption causes some optimizations disabled for amdgcn---amdgiz target. After discussions at https://reviews.llvm.org/D40670, I propose to introduce TargetTransformInfo::isAllocaPtrValueNonZero for representing whether alloca instruction always has non-zero value, and add a TargetTransformInfo argument to ValueTracking functions e.g. isKnownNonZero(). As a result, passes using ValueTracking will require TargetTransformInfo. Comments are welcome. Thanks. Sam --...
2017 Dec 15
2
RFC: Exposing TargetTransformInfo factories from TargetMachine
Hi all, I'd like to be able to use TargetTransformInfo to make architecture specific code generation decisions from the XLA LLVM IR emitter[0]. However, we don't have a great way to do this today -- TargetTransformInfo is wrapped in a TargetIRAnalysis and getting the TargetTransformInfo out of it requires something like: FunctionAnalysisManager...
2017 Dec 14
3
[RFC] Add TargetTransformInfo::isAllocaPtrValueNonZero and let ValueTracking depend on TargetTransformInfo
...:isAllocaPtrValueNonZero() to check whether alloca always has non-zero value. Sam From: Hal Finkel [mailto:hfinkel at anl.gov] Sent: Thursday, December 14, 2017 4:06 PM To: Liu, Yaxun (Sam) <Yaxun.Liu at amd.com>; llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] [RFC] Add TargetTransformInfo::isAllocaPtrValueNonZero and let ValueTracking depend on TargetTransformInfo Hi, Sam, Our general design has been that TTI is for cost modeling, not for providing semantic information. This piece of information can go in DataLayout, and I think we should put it there. Especially given that this...
2013 Jan 05
1
[LLVMdev] RFC: Can we make TargetTransformInfo an analysis group?
I know, I said a bad word -- analysis group. But it works pretty much the way I think we want here. We *always* want a TargetTransformInfo, and we have reasonable (conservative) stubs in place. We would just like the option of providing one from the target that has very clever implementations. I would propose that we make TargetTransformInfo be an analysis group, and provide NoTargetTransformInfo as the shim implementation, and each...
2016 Jun 02
4
[GSoC 2016] Parameters of a target architecture
...f cache levels (size of cache lines, associativity degrees, sizes). Could you please advise me where I can find such information? If I'm not mistaken, we can get the size of a cache line and the width of the largest vector register (which probably helps to determine the second parameter) from TargetTransformInfo.h. I would be very grateful for your comments, feedback and ideas. Refs.: [1] - http://www.cs.utexas.edu/users/flame/pubs/TOMS-BLIS-Analytical.pdf -- Cheers, Roman Gareev.
2013 Dec 05
4
[LLVMdev] [RFC] CGContext skeleton implementation
...nderstand is why CGContext is tied to to > CodeGen objects and initialized at ISelLowering. We should be able to get a > CGContext from a TargetMachine by providing a Function. > > IR passes like the LoopVectorizer and LSR also require subtarget > information. This was formalized by TargetTransformInfo. Now any pass using > TargetTransformInfo needs to respect the current Function attributes, which > means reinitializing subtarget info. I also think that IR passes should use > the same interface as SD/MI passes to query codegen modes, rather than > directly querying Function attribute...
2017 Dec 15
4
RFC: Exposing TargetTransformInfo factories from TargetMachine
...l at anl.gov> wrote: > Are there reasons why we might not want to do this? Other options we should > consider? It does make the TargetMachine -> TargetIRAnalysis path less abstract, but given that all targets have the same pattern of instantiating a TargetIRAnalysis with a Function->TargetTransformInfo hook, the abstraction does not seem particularly useful. I might do even a simpler form of the patch though -- instead of returning a function pointer from TargetMachine, just add a virtual function to TargetMachine that creates the TargetTransformInfo directly from a Function. -- Sanjoy > &g...
2015 Feb 04
2
[LLVMdev] Is this a bug with loop unrolling and TargetTransformInfo ?
Hi, I ran into this issue recently and wanted to know if it was a bug or expected behavior. In the R600 backend's TargetTransformInfo implementation, we were setting UnrollingPreferences::Count = UINT_MAX. This was a mistake as we should have been setting UnrollingPreferences::MaxCount instead. However, as a result of setting Count to UINT_MAX, this loop would be unrolled 15 times: if (b + 4 > a) { for (int i = 0; i <...
2017 Dec 15
3
[RFC] Add TargetTransformInfo::isAllocaPtrValueNonZero and let ValueTracking depend on TargetTransformInfo
> On Dec 14, 2017, at 20:28, Hal Finkel via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Would that address your use case? Or can you have null dereferenceable pointers in that address space, just not ones from alloca? I would like to clarify what “null” means exactly. One related thing I would like in the future is for the DataLayout to specify what numeric value is the
2013 Dec 03
0
[LLVMdev] [RFC] CGContext skeleton implementation
...posal. What I don't understand is why CGContext is tied to to CodeGen objects and initialized at ISelLowering. We should be able to get a CGContext from a TargetMachine by providing a Function. IR passes like the LoopVectorizer and LSR also require subtarget information. This was formalized by TargetTransformInfo. Now any pass using TargetTransformInfo needs to respect the current Function attributes, which means reinitializing subtarget info. I also think that IR passes should use the same interface as SD/MI passes to query codegen modes, rather than directly querying Function attributes. For that reason,...
2014 Jul 18
2
[LLVMdev] TLI vs. TTI
Hi, I noticed many functions in the TargetTransformInfo interface are duplicates of those already in TargetLowering (e.g. isTruncateFree). Is the expectation really that targets will reimplement the same functions twice? AArch64’s TTI uses some TLI calls in some of its implementations, but why doesn’t the base TargetTransformInfo call the TargetLowering...
2013 Dec 06
0
[LLVMdev] [RFC] CGContext skeleton implementation
...t I don't understand is why CGContext is tied to to CodeGen objects and initialized at ISelLowering. We should be able to get a CGContext from a TargetMachine by providing a Function. > > IR passes like the LoopVectorizer and LSR also require subtarget information. This was formalized by TargetTransformInfo. Now any pass using TargetTransformInfo needs to respect the current Function attributes, which means reinitializing subtarget info. I also think that IR passes should use the same interface as SD/MI passes to query codegen modes, rather than directly querying Function attributes. For that reason,...
2018 Jan 17
0
[RFC] [TargetTransformInfo] Introduce hook to tell middle-end to not worry about register pressure
...ArgumentPromotion). However, in the architecture that are register-rich, e.g. FPGAs, we do not need to worry about the register pressure at all. For these architecures, we may want to optimization the LLVM IR without worrying about the register pressure. I suggest that we introduce a hook in the TargetTransformInfo to tell if the current target architecture is register-rich or not. With this hook, we can enable the optimizations that increase register pressure in case the current architecture is register-rich. One problem for introducing this hook: we are not able to test it (in the public buildbot) without...
2015 Jan 14
6
[LLVMdev] Instruction Cost
Hi, I'm looking for APIs that compute instruction costs, and noticed several of them. 1. A series of APIs of TargetTransformInfo that compute the cost of instructions of a particular type (e.g. getArithmeticInstrCost and getShuffleCost) 2. TargetTransformInfo::getOperationCost 3. CostModel::getInstructionCost::getInstructionCost in lib/Analysis/CostModel.cpp Only the first one is used extensively in LLVM's code base, bu...
2013 May 09
2
[LLVMdev] Simple Loop Vectorize Question
...s in no vectorization. From the debug output I can see that the issue boils down to: LV: The Widest type: 32 bits. LV: The Widest register is:32bits. I tried to work back through the source code to figure out why the widest register is incorrect, though I get lost following the code logic for how TargetTransformInfo gets initialized. Therefore, I have two questions: 1) Can -force-vector-width be specified from the C++ API? And if so, how? 2) What am I neglecting to do so that TargetTransformInfo is set correctly and vectorization happens without forcing a vector width? Ultimately I would like use vectorizatio...
2013 Jul 29
0
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
On 7/16/2013 11:38 PM, Andrew Trick wrote: > Since introducing the new TargetTransformInfo analysis, there has been some confusion over the role of target heuristics in IR passes. A few patches have led to interesting discussions. > > To centralize the discussion, until we get some documentation and better APIs in place, let me throw out an oversimplified Straw Man for a new pass p...
2013 Jul 17
5
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
Since introducing the new TargetTransformInfo analysis, there has been some confusion over the role of target heuristics in IR passes. A few patches have led to interesting discussions. To centralize the discussion, until we get some documentation and better APIs in place, let me throw out an oversimplified Straw Man for a new pass pipline. I...
2014 Jan 06
2
[LLVMdev] [RFC] CGContext skeleton implementation
...upport subtarget-specific code generation. Do we have a solution that can work with TTI? I don’t think there was any objection to putting CGContext in TargetMachine, except that we have too many layers of abstraction, which you said will be cleaned up eventually: IR Transform (links with) -> TargetTransformInfo (dynamic call) -> X86TTI (links with) -> TargetMachine (provides) -> CGContext -Andy > > > On Thu, Dec 5, 2013 at 6:19 PM, Dan Gohman <dan433584 at gmail.com> wrote: > > > > On Mon, Dec 2, 2013 at 4:25 PM, Andrew Trick <atrick at apple.com> wro...
2014 May 28
2
[LLVMdev] Why does Select have a higher speculation cost than other instructions?
...fyCFG.cpp uses a higher speculation cost for Select than other instructions. Does anyone know why this is? I would like SimplifyCFG to be able to speculatively execute Select instructions. Which of these solutions makes the most sense: 1. Change speculation cost of Select from 2 to 1. 2. Add a TargetTransformInfo callback for Select speculation cost. 3. Add a TargetTransformInfo callback for PhiNodeFoldingThreshold to enable speculation of more expensive instructions. 4. Something else. Thanks, Tom
2013 May 10
2
[LLVMdev] Simple Loop Vectorize Question
...to be ignored as garbage values for -mcpu don't raise an error. Am I overlooking something else also? Many Thanks, Josh On Thu, May 9, 2013 at 6:06 PM, Nadav Rotem <nrotem at apple.com> wrote: > Hi Josh, > > Your modules does not have a triple, so the target machine and > TargetTransformInfo have no way of knowing if you are running on a machine > with vector registers. Try adding the '-mcpu=XXXX' to opt and see what > happens. > > Thanks, > Nadav > > On May 9, 2013, at 1:42 PM, Josh Klontz <josh.klontz at gmail.com> wrote: > > Hi! I am trying...