search for: targetfeatur

Hi All, I just added this table: http://llvm.org/docs/CodeGenerator.html#targetfeatures To help explain what features are supported by what targets. We've long had a variety of vague statements on various web pages, and having a centralized place that lists all the supported targets and what features they have seems useful. Improvements and additions are welcome. I don't...

On 24 October 2010 17:21, Chris Lattner <clattner at apple.com> wrote: > I just added this table: > http://llvm.org/docs/CodeGenerator.html#targetfeatures Hi Chris, That's great! I didn't know ARM back-end had support for inline assembly. If there is no assembly parser, does it call gas in a special way? -- cheers, --renato http://systemcall.org/ Reclaim your digital rights, eliminate DRM, learn more at http://www.defectivebydesign.o...

...as: 1. Changes to LLVM code outside your target directory. 2. Your new target directory. 3. Clang patches. As others have pointed out, you really do need some basic regression tests to make sure that the backend is working. Also, make sure to update this: http://llvm.org/docs/CodeGenerator.html#targetfeatures and add a new section to that document on your target. Thanks! -Chris

...code outside your target directory. > 2. Your new target directory. > 3. Clang patches. > > As others have pointed out, you really do need some basic regression tests to make sure that the backend is working. Also, make sure to update this: > http://llvm.org/docs/CodeGenerator.html#targetfeatures > > and add a new section to that document on your target. > > Thanks! > > -Chris Hi Chris, Will do! WRT new files, I assume you want them as part of a patch rather than in a tar file or some other format. Is that correct? I will create a basic regression suite for Hexago...

...;full port". We are preparing to add out native linux compiler to the official build bots. Are there various official "gating" criteria for different levels of llvm "doneness" so to speak? There is a matrix I see in http://llvm.org/releases/3.0/docs/CodeGenerator.html#targetfeatures which seems to be old. For example, I would definitely consider the MIPS port to be reliable and other things like .o writing are definitely in there. The various current llvm build bots seem to do different levels of testing.

Hello all, We would like to contribute a new backend for Qualcomm's Hexagon processor. We will actively maintain the port once it is accepted. Hexagon is a VLIW core that is used principally in modem and low power audio applications in Qualcomm's chip sets. We have a patch for both llvm and for clang. As this is a new port, these patches are quite large (approximately 26k and 3k